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[Crack Hack] aes_encrypt

Description: AES加密软件，用于加密当前文本框中的内容。使用的是美国国家标准（也被ISO所采纳）最新加密算法AES。-AES encryption software, encryption for the current contents of the text box. The use of the American National Standards (also adopted by the ISO) the latest encryption algorithm AES.
Platform: | Size: 216064 | Author: | Hits:

[Speech/Voice recognition/combine] text2phone

Description: 一个法语的TTS系统，使用perl编写。Text2phone is a French Text To Speech (TTS) written in Perl -a French TTS system, using perl prepared. Text2phone is a French Text To Speech (TTS) writ ten in Perl
Platform: | Size: 14336 | Author: xusihao | Hits:

[VHDL-FPGA-Verilog] led

Description: vhdl实现“PLD电子技术”（文字显示）-VHDL achieve PLD electronic technology (text)
Platform: | Size: 1024 | Author: 阿乔 | Hits:

[VHDL-FPGA-Verilog] cf_fp_mul

Description: 浮点型的乘法器,采用VHDL语言描述浮点型的乘法器,文中包含测试文件-Floating-point type multiplier using VHDL language to describe the type floating-point multiplier, the text included in the test document
Platform: | Size: 687104 | Author: asdtgg | Hits:

[VHDL-FPGA-Verilog] uart

Description: 串口通讯协议，你您可以自己建个工程，再将需要的VHDL文本，添加到工程中，理解程序在仿真！-Serial communication protocol, you can build your project, and then need VHDL text, added to the project, understand the procedures in the simulation!
Platform: | Size: 10240 | Author: 张亚伟 | Hits:

[Software Engineering] Asyn_FIFO_Design

Description: 异步FIFO设计的说明文档，需要注意的问题以及源码（在文中有）。是标准的异步FIFO，可综合。-Asynchronous FIFO design documentation, as well as the need to pay attention to source code (in the text have). Is a standard asynchronous FIFO, can be integrated.
Platform: | Size: 228352 | Author: 刘强 | Hits:

[Software Engineering] multiplier_8bit

Description: 异步FIFO设计的说明文档，需要注意的问题以及源码（在文中有）。是标准的异步FIFO，可综合。-Asynchronous FIFO design documentation, as well as the need to pay attention to source code (in the text have). Is a standard asynchronous FIFO, can be integrated.
Platform: | Size: 46080 | Author: 刘强 | Hits:

[assembly language] VHDL

Description: 包内共有六个源代码，每个文本的名称为其功能名称，用汉语拼音拼写。-A total of six package source code, the name of each text for its function name, using Pinyin spelling.
Platform: | Size: 2048 | Author: fyy | Hits:

[USB develop] usb_funct

Description: usb2.0 ip 文挡齐全,并已经过FPGA的验证,希望大家支持-usb2.0 ip complete text block, and has been FPGA verification, I hope you will support
Platform: | Size: 208896 | Author: kin | Hits:

[ARM-PowerPC-ColdFire-MIPS] rong

Description: 一个IIC总线的代码，一个VGA显示文字代码，目前VGA可以显示彩条，但是现实文字较少，一个本科学生兰编写，还不错，共享下，大家参考，IIC编写的比较经典，可以 学习怎么写一个处理器的外设控制器。-IIC bus is a code, a VGA display text code, the current color VGA displays, but less realistic characters, a lan to prepare undergraduate students, but also good to share, the U.S. reference, IIC comparison prepared classics, can learn how to write a processor peripheral controller.
Platform: | Size: 1773568 | Author: rong | Hits:

[VHDL-FPGA-Verilog] textio

Description: vhdl testbench的编写，textio的编写是一个难点，也是一个重点，而这是本人搜集的多篇关于textio的文章，同时附有简单注释!-vhdl testbench preparation, textio the preparation is a difficult, but also a focus, and this is my collection of articles on textio the article, at the same time with a simple note!
Platform: | Size: 1327104 | Author: horse | Hits:

[VHDL-FPGA-Verilog] CPU_16

Description: vhdl语言的16b cpu代码 全部的代码我会依次上传 另有说明txt文本-VHDL language 16b cpu code all the code I will upload the text otherwise stated txt
Platform: | Size: 1024 | Author: 闵瑞鑫 | Hits:

[Books] ComunicationRealizationBetweenFPGAandSerialInterfa

Description: 杜晓斌和陈兴文-FPGA和单片机串行通信接口的实现一文提出了FPGA与单片机实现数据串行通信的解决方案。在通信过程中完全遵守RS232 协议，给出了发送模块的vhdl源代码。 -杜晓斌and陈兴文-FPGA single-chip serial communication interface and the realization of a text proposed by the FPGA and MCU serial data communications solutions. In the communication process in full compliance with the RS232 protocol is given to send the VHDL source code modules.
Platform: | Size: 92160 | Author: Wuxinmin | Hits:

[ARM-PowerPC-ColdFire-MIPS] DesignofIntegratedCircuitsforOpticalCommunications

Description: Design of Integrated Circuits for Optical Communications deals with the design of high-speed integrated circuits for optical communication systems. Written for both students and practicing engineers, the book systematically takes the reader from basic concepts to advanced topics, establishing both rigor and intuition. The text emphasizes analysis and design in modern VLSI technologies, particularly CMOS, and presents numerous broadband circuit techniques. Leading researcher Behzad Razavi is also the author of Design of Analog CMOS Integrated Circuits. -Design of Integrated Circuits for Optical Communications deals with the design of high-speed integrated circuits for optical communication systems. Written for both students and practicing engineers, the book systematically takes the reader from basic concepts to advanced topics, establishing both rigor and intuition. The text emphasizes analysis and design in modern VLSI technologies, particularly CMOS, and presents numerous broadband circuit techniques. Leading researcher Behzad Razavi is also the author of Design of Analog CMOS Integrated Circuits.
Platform: | Size: 10731520 | Author: huang | Hits:

[VHDL-FPGA-Verilog] fft1

Description: a nice text file explaining the fft
Platform: | Size: 1024 | Author: amer | Hits:

[Other] SOPC_EDA

Description: 目 录 第一章 VHDL文本输入设计方法 1.1 编辑输入并存盘VHDL原文件 1.2 将当前设计设定为工程 1.3 选择VHDL文本编译版本号和排错 1.4 时序仿真 1.5 硬件测试 1.6 部分实验 第二章 全国大学生电子设计竞赛赛题练习 2.1 等精度频率计设计 2.2 数字移相正弦信号发生器设计 2.3 测相仪设计 2.4 逻辑分析相仪设计 2.5 存储示波器设计-Contents Chapter VHDL design method of text entry Edit 1.1 enter and save the original document VHDL Design 1.2 will present works set to select VHDL version 1.3 compiler version number and troubleshooting 1.4 Timing Simulation 1.5 hardware testing some experimental chapter 1.6 National Undergraduate Electronic Design Cup title race practice, such as precision 2.1 Cymometer 2.2 Designed Digital Phase Shifter Designed Sine Signal Generator 2.3 Design phase measurement logic analysis 2.4 Design 2.5 Design of Storage Oscilloscope
Platform: | Size: 3725312 | Author: 黑月 | Hits:

[Industry research] VHDL_module9

Description: VHDL text IO description
Platform: | Size: 556032 | Author: mr_milo | Hits:

[VHDL-FPGA-Verilog] Text-IO

Description: 基于VHDL的Testbench读取文件的编写，很有用的 基于VHDL的Testbench读取文件的编写，很有用的-VHDL Code text_io for the "Simple Test Bench" example VHDL Code about text_io for the "Simple Test Bench" example
Platform: | Size: 1024 | Author: 帅哥新 | Hits:

[VHDL-FPGA-Verilog] digital-system-design-using-vhdl

Description: this text book is very important it will help u in learning vhdl easily-this text book is very important it will help u in learning vhdl easily...
Platform: | Size: 5476352 | Author: tinku | Hits:

[VHDL-FPGA-Verilog] TEST5

Description: 8位硬件加法器设计 熟悉Quartus II的VHDL文本设计流程全过程，学习简单时序电路的设计、仿真和测试。-eight bit Hardware adder design Familiar with Quartus II VHDL text design flow process, learn the simple sequential circuits design, simulation and testing
Platform: | Size: 27648 | Author: 无忌 | Hits:
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