Search - vhdl turbo code

[VHDL-FPGA-Verilog] gongcehngsheji_477-2

Description: 使用该VHDL在仿真软件中实现RSC(递归系统卷积)码的编码以及解码硬件仿真-use of the VHDL simulation software in achieving RSC (recursive convolution system) code encoding and decoding hardware simulation
Platform: | Size: 6144 | Author: 李超 | Hits:

[Communication-Mobile] turbo_VHDL

Description: Turbo Decoder Release 0.3 * Double binary, DVB-RCS code * Soft Output Viterbi Algorithm * MyHDL cycle/bit accurate model * Synthesizable VHDL model -Turbo Decoder Release 0.3* Double binary, DVB-RCS code* Soft Output Viterbi Algorithm* M yHDL cycle/bit accurate model* Synthesizable VHDL model
Platform: | Size: 154624 | Author: | Hits:

[VHDL-FPGA-Verilog] Turbo

Description: 基于fpga的交织编码器设计，主要讲叙如何在fpga上实现交织编码器。-something about turbo。
Platform: | Size: 1837056 | Author: xixi | Hits:

[Documents] Turbo

Description: 一种新的turbo码的交织编码器的vhdl设计，用的是螺旋输入。-something about turbo
Platform: | Size: 305152 | Author: xixi | Hits:

[VHDL-FPGA-Verilog] 4_31

Description: 这是一个交织器/解交织器的FPGA实现，虽然交织器的功能简单，但是其实现比较复杂-This is an interleaver/de-interleaver to achieve the FPGA, although the function of interleaver simple, but its more complicated to achieve
Platform: | Size: 834560 | Author: 谢建伟 | Hits:

[Communication] control

Description: Turbo码编码器时序控制模块，能够对于RAM，ROM读写以及编码器其他功能模块的使能进行控制-Turbo code encoder timing control module, to the RAM, ROM reader and encoder modules, other functions can be controlled so that
Platform: | Size: 1024 | Author: sunhao | Hits:

[DSP program] delete

Description: Turbo码编码器的删除模块，此模块是CCSDS标准系的码率为1/2和1/3的删除模块-Turbo code encoder to delete module, this module is the Department of CCSDS standard rate of 1/2 and 1/3 of the delete module
Platform: | Size: 1024 | Author: sunhao | Hits:

[Communication-Mobile] encode_finish

Description: Turbo码编码器的encode最上层模块，它的主要作用是连接Turbo码编码器的其他模块-Turbo code encoder encode top-level module, its main role is to connect the Turbo Code encoder other modules
Platform: | Size: 1024 | Author: sunhao | Hits:

[Other] rom

Description: Turbo码编码器的Rom宏模块，此模块中包含Rom.v文件和存储交织地址的.mif文件-Turbo code encoder Rom macro module, this module contains intertwined Rom.v documents and store addresses. Mif file
Platform: | Size: 9216 | Author: sunhao | Hits:

[VHDL-FPGA-Verilog] RSC

Description: Turbo码编码器的两个分量编码器RSC，主要由四个移位寄存器和两个模2加法器组成-Turbo code encoder of the two component encoders RSC, mainly by the four shift register and the two-mode adder composed of 2
Platform: | Size: 1024 | Author: sunhao | Hits:

[Communication] Turbo

Description: 利用3GPP交织器和LTE交织器完成turbo码的仿真并做比较，不同解码算法的比较-Using 3GPP Interleaver and complete LTE interleaver turbo code simulation and comparison, a comparison of different decoding algorithms
Platform: | Size: 112640 | Author: 老五 | Hits:

[Software Engineering] gh_vhdl_library_latest[1].tar

Description: turbo codinf in vhdl code
Platform: | Size: 3015680 | Author: deniz | Hits:

[Books] Errorcontrolcoding

Description: 信道编码非常有用的一本书，可以供通信方面的参考一下-　A reorganized and comprehensive major revision of a classic book, this edition provides a bridge between introductory digital communications and more advanced treatment of information theory. Completely updated to cover the latest developments, it presents state-of-the-art error control techniques. Coverage of the fundamentals of coding and the applications of codes to the design of real error control systems. Contains the most recent developments of coded modulation, trellises for codes, soft-decision decoding algorithms, turbo coding for reliable data transmission and other areas. There are two new chapters on Reed-Solomon codes & concatenated coding schemes. Also contains hundreds of new and revised examples and more than 200 illustrations of code structures, encoding and decoding circuits and error performance of many important codes and error control coding systems. Appropriate for those with minimum mathematical background as a comprehensive reference for coding theory.
Platform: | Size: 21752832 | Author: vidivici | Hits:

[VHDL-FPGA-Verilog] turbocodes_latest.tar

Description: turbo encode and decoder
Platform: | Size: 83968 | Author: suresh | Hits:

[VHDL-FPGA-Verilog] turbodecoder

Description: 用vhdl实现turbo码的迭代解码，转某N人的程序-Using vhdl implementation of iterative decoding turbo codes, transfer of a person' s procedures for N
Platform: | Size: 158720 | Author: deng | Hits:

[VHDL-FPGA-Verilog] turbo

Description: turbo的VHDL代码比较好啊易后大家多多交流啊-Comparison of the VHDL code for turbo Well you lot of the easy exchange of ah
Platform: | Size: 153600 | Author: 秋晨 | Hits:

[VHDL-FPGA-Verilog] jiaozhiqi

Description: 是Turbo码交织器的VHDL设计与仿真的文献-Is the Turbo Code Interleaver Design and Simulation of VHDL literature
Platform: | Size: 765952 | Author: 郑国 | Hits:

[VHDL-FPGA-Verilog] turbo

Description: Turbo仿真。VHDL语言。对学习编码很有帮助-Turbo
Platform: | Size: 8192 | Author: 朱宇容 | Hits:

[VHDL-FPGA-Verilog] tpc

Description: turbo product code used in error correction
Platform: | Size: 254976 | Author: ansh | Hits:

[VHDL-FPGA-Verilog] 15Turbo

Description: urbo码是1993年法国人Berrou提出的一种新型编码方法。它巧妙的将卷积码和随机交织器结合在一起；同时，采用软输出迭代译码来逼近最大似然译码-urbo code is 1993 French Berrou proposed a new encoding method. It is clever to convolutional codes and random interleaver together the same time, the use of soft-output iterative decoding to approximate the maximum likelihood decoding
Platform: | Size: 62464 | Author: wangzhi | Hits:

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[VHDL-FPGA-Verilog] gongcehngsheji_477-2

[Communication-Mobile] turbo_VHDL

[VHDL-FPGA-Verilog] Turbo

[Documents] Turbo

[VHDL-FPGA-Verilog] 4_31

[Communication] control

[DSP program] delete

[Communication-Mobile] encode_finish

[Other] rom

[VHDL-FPGA-Verilog] RSC

[Communication] Turbo

[Software Engineering] gh_vhdl_library_latest[1].tar

[Books] Errorcontrolcoding

[VHDL-FPGA-Verilog] turbocodes_latest.tar

[VHDL-FPGA-Verilog] turbodecoder

[VHDL-FPGA-Verilog] turbo

[VHDL-FPGA-Verilog] jiaozhiqi

[VHDL-FPGA-Verilog] turbo

[VHDL-FPGA-Verilog] tpc

[VHDL-FPGA-Verilog] 15Turbo

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