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[VHDL-FPGA-Verilog] DEMO22

Description: ＶＨＤＬ源程序，ＭＡＸＰＬＵＳ　环境下运行，电梯控制系统-VHDL source code, under Operation Converter, elevator control system
Platform: | Size: 598016 | Author: liu | Hits:

[VHDL-FPGA-Verilog] dac

Description: DAC converter design with Verilog code and testbench
Platform: | Size: 527360 | Author: 田磊 | Hits:

[VHDL-FPGA-Verilog] NRZ_2_Manchester

Description: NRZ码到Manchester转换器 verilog-NRZ code to Verilog converter Manchester
Platform: | Size: 1024 | Author: leysion | Hits:

[VHDL-FPGA-Verilog] rgb2ycrcb

Description: RGB转为YCBCR格式的verilog源代码，对熟悉verilog编程有帮助-RGB to YCbCr format Verilog source code, to people familiar with Verilog programming help
Platform: | Size: 17408 | Author: dongming | Hits:

[VHDL-FPGA-Verilog] Bin16_BCD5

Description: it is a binary16 to BCD converter .it will work on spartan 3 xilini devices.
Platform: | Size: 1024 | Author: ali | Hits:

[VHDL-FPGA-Verilog] bin2bcd

Description: Binary to BCD converter
Platform: | Size: 1024 | Author: Natacho | Hits:

[SCM] ads7822

Description: 利用Verilog语言实现读取ADS7822模数转换芯片的串行输出数据-it is convinient for us to use A/D converter to get digital data
Platform: | Size: 1024 | Author: sihongchang | Hits:

[VHDL-FPGA-Verilog] THS5651_TEST

Description: THS5651是一款高速DA转换器，最高转换频率可到达100MBPS，该程序利用VHDL语言对THS5651进行控制-THS5651 is a high-speed DA converter, the maximum conversion frequency can be arrived at 100MBPS, the use of VHDL language in the process control of the THS5651
Platform: | Size: 1645568 | Author: 陈宇 | Hits:

[VHDL-FPGA-Verilog] vhd2vl

Description: VHDL to verilog converter
Platform: | Size: 41984 | Author: sanj | Hits:

[VHDL-FPGA-Verilog] xapp283

Description: YUV到RGB的色彩空间转换器(VHDL,Verilog and doc)-Color Space Converter: Y’CrCb to R’G’B’
Platform: | Size: 175104 | Author: wicky | Hits:

[VHDL-FPGA-Verilog] Binary_to_BCD_Converter

Description: General Binary-to-BCD Converter The linked code is a general binary-to-BCD Verilog module, and I have personally tested the code.
Platform: | Size: 25600 | Author: volkan | Hits:

[Embeded Linux] 83390078DDS

Description: DDS的工作原理是以数控振荡器的方式产生频率、相位可控制的正弦波。电路一般包括基准时钟、频率累加器、相位累加器、幅度/相位转换电路、D/A转换器和低通滤波器（LPF）。频率累加器对输入信号进行累加运算，产生频率控制数据X（frequency data或相位步进量）。相位累加器由N位全加器和N位累加寄存器级联而成，对代表频率的2进制码进行累加运算，是典型的反馈电路，产生累加结果Y。幅度/相位转换电路实质上是一个波形寄存器，以供查表使用。读出的数据送入D/A转换器和低通滤波器。-DDS works the way we are digitally controlled oscillator frequency, phase controlled sine wave. Circuits generally include reference clock, frequency accumulator, phase accumulator, amplitude/phase converter circuit, D/A converter and low-pass filter (LPF). The frequency accumulator to accumulate the input signal operation to produce the frequency control data X (frequency data or phase stepping volume). From the N-bit phase accumulator and the N-bit full adder cascade accumulation register is made on behalf of the frequency of the two binary codes accumulation operation, is a typical feedback circuit, resulting in cumulative results of Y. Amplitude/phase converter circuit is essentially a waveform register for look-up table to use. Read out the data into the D/A converter and low pass filter.
Platform: | Size: 44032 | Author: 394177191 | Hits:

[Other] hdl2htm

Description: Converter for Verilog or VHDL to HTML
Platform: | Size: 7168 | Author: Roman | Hits:

[VHDL-FPGA-Verilog] SERDES

Description: 基于Verilog的串并转换器的设计与实现，采用两种不同的方案来实现串并和并串转换的功能，并用ISE软件仿真以及chipscope的调试-Verilog-based serial and parallel converter design and implementation of two different programs to achieve the string and and and string conversion functions, and use the ISE software simulation and debugging chipscope
Platform: | Size: 785408 | Author: 陈凯 | Hits:

[Software Engineering] vhd2vl

Description: vhdl to verilog rtl converter, it support simple vhdl syntax, i think it is very useful
Platform: | Size: 38912 | Author: xilei | Hits:

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