Welcome![Sign In][Sign Up]
Location:
Search - wishbone master vhdl

Search list

[MiddleWareopencores_i2c_master

Description: i2c VHDL,能够实现I2C 用的是wishbone总线
Platform: | Size: 193536 | Author: wang | Hits:

[VHDL-FPGA-Verilogwb_rtc

Description: // -*- Mode: Verilog -*- // Filename : wb_master.v // Description : Wishbone Master Behavorial // Author : Winefred Washington // Created On : 2002 12 24 // Last Modified By: . // Last Modified On: . // Update Count : 0 // Status : Unknown, Use with caution! // Description Specification // General Description: 8, 16, 32-bit WISHBONE Master // Supported cycles: MASTER, READ/WRITE // MASTER, BLOCK READ/WRITE // MASTER, RMW // Data port, size: 8, 16, 32-bit // Data port, granularity 8-bit // Data port, Max. operand size 32-bit // Data transfer ordering: little endian // Data transfer sequencing: undefined-//-*- Mode: Verilog-*- // Filename : wb_master.v // Description : Wishbone Master Behavorial // Author : Winefred Washington // Created On : 2002 12 24 // Last Modified By: . // Last Modified On: . // Update Count : 0 // Status : Unknown, Use with caution! // Description Specification // General Description: 8, 16, 32-bit WISHBONE Master // Supported cycles: MASTER, READ/WRITE // MASTER, BLOCK READ/WRITE // MASTER, RMW // Data port, size: 8, 16, 32-bit // Data port, granularity 8-bit // Data port, Max. operand size 32-bit // Data transfer ordering: little endian // Data transfer sequencing: undefined
Platform: | Size: 8192 | Author: 姓名 | Hits:

[VHDL-FPGA-Verilogwishbone_i2c_master_vhd

Description: wishbone i2c master vhdl code
Platform: | Size: 5120 | Author: | Hits:

[Communication-Mobilewb_lpc_latest.tar

Description: Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read and Write cycles, 8-bit Memory Read/Write cycles, DMA cycles, and up to 32-bit Firmware memory read/write cycles. Serial IRQ support is also provided. None of this has been tested (yet) with a third-party LPC Peripheral or Host.
Platform: | Size: 410624 | Author: Arun | Hits:

[Otherspi_master

Description: SPI wishbone master and verification environment
Platform: | Size: 2506752 | Author: 王小墨 | Hits:

CodeBus www.codebus.net