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VHDL-FPGA-Verilog list
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cputop
Downloaded:0
CPU is simply developed and implemented with Verilog. And carry out the experiment of the lower plate
Update
: 2025-01-08
Size
: 11.64mb
Publisher
:
zysps1
yiweiLED
Downloaded:0
Using the Verilog language to implement the LED lamp shift function
Update
: 2025-01-08
Size
: 2.65mb
Publisher
:
四海
adder_4bits
Downloaded:0
Implement the function of four bit first adder and test code
Update
: 2025-01-08
Size
: 2kb
Publisher
:
FM姜子牙
5 +3
Downloaded:0
FPGA sends SOS to save, key can send signal, reset to stop sending
Update
: 2025-01-08
Size
: 3.5mb
Publisher
:
温酒清禾
i2c
Downloaded:0
I2C bus Verilog simulation, quartus
Update
: 2025-01-08
Size
: 148kb
Publisher
:
zed_awp
college address
Downloaded:0
VHDL WINDOWS EMBEDEDDED SCM DEVELOP
Update
: 2025-01-08
Size
: 73kb
Publisher
:
cietce
EDA
Downloaded:0
fpga It is very useful for any one who wan to learn fpga.
Update
: 2025-01-08
Size
: 3.85mb
Publisher
:
晚风拂柳颜
AGC
Downloaded:0
The AGC is a smart programmable gain amplifier (PGA). The amplifier gain is adjusted based upon the input signal level so that the output is at a specified Target Gain. The AGC can be configured to be either a mono or st
Update
: 2025-01-08
Size
: 343kb
Publisher
:
Eagle007
lowpower
Downloaded:0
The greatest common divisor (GCD) stein algorithm, low power state machine implementation
Update
: 2025-01-08
Size
: 3kb
Publisher
:
BetaGo
highperformance
Downloaded:0
The greatest common divisor (GCD) stein algorithm, high performance pipeline implementation.
Update
: 2025-01-08
Size
: 2kb
Publisher
:
BetaGo
cpu_2013
Downloaded:0
The simplified 16 bit CPU design consists of a buffer, instruction memory, data memory and other basic modules
Update
: 2025-01-08
Size
: 17.42mb
Publisher
:
施魍魉
scripts
Downloaded:0
The implementation of the low pass filter, after the implementation of different cutting methods, the use of the generated vivado file resources is different, to analyze it.
Update
: 2025-01-08
Size
: 4.48mb
Publisher
:
wn10233
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.27
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132
.33
.34
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.36
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4311
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