VHDL-FPGA-Verilog List Page 134

VHDL-FPGA-Verilog list

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spi_no_cs_13 Downloaded：0: Use FPGA as slave,realize the communication between FPGA and STM32. The function has been tested is no problem.
Update : 2025-01-09 Size : 13.74mb Publisher : Pgaf
tx_rx_fifo Downloaded：0: Use fifo to realize the receive and send function of the uart. The function is no problem.
Update : 2025-01-09 Size : 3.62mb Publisher : Pgaf
ad706_test Downloaded：0: The drive program of AD7606 write by verilog. FPGA can convert the AD7606'sigal to volatage and send the converted signal to PC through uart.
Update : 2025-01-09 Size : 14.29mb Publisher : Pgaf
OV7670_TFT Downloaded：0: OV7670 video capture and watermark function
Update : 2025-01-09 Size : 13.27mb Publisher : rEAL_小明
VHDL2FSK Downloaded：0: The principle and code of each part of the VHDL 2FSK modem
Update : 2025-01-09 Size : 552kb Publisher : 打发大叔大婶
rdf0028 Downloaded：1: Multiboot on Xilinx SP605
Update : 2025-01-09 Size : 906kb Publisher : aguilarjp
rdf0029 Downloaded：0: DDR3 Memory Interface
Update : 2025-01-09 Size : 4.07mb Publisher : aguilarjp
rdf0030 Downloaded：0: Restore Flash Contents
Update : 2025-01-09 Size : 6.95mb Publisher : aguilarjp
rdf0031 Downloaded：0: MicroBlaze Built In Self Test
Update : 2025-01-09 Size : 1.05mb Publisher : aguilarjp
rdf0032 Downloaded：0: Xilinx SP605 Built-In Self Test
Update : 2025-01-09 Size : 6.41mb Publisher : aguilarjp
PWM Downloaded：0: The Verilog language is used to design a PWM controller, which is realized: the controller input clock 1MHz; the controller output pulse cycle 1kHz, and the pulse width minimum adjustment step 0.1%.
Update : 2025-01-09 Size : 61kb Publisher : jcg17
pci9504 Downloaded：0: The Verilog language writes the interface circuit of the PCI9054 controller to realize the transfer control of the PCI bus to the local 8 bit bus
Update : 2025-01-09 Size : 20kb Publisher : jcg17

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