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VHDL-FPGA-Verilog list
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Encoders, decoders and RAM Model
Update : 2025-01-10 Size : 11kb Publisher : sheldon01

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Fast generic RAM model
Update : 2025-01-10 Size : 150kb Publisher : sheldon01

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Linear Feedback Shift Register (LFSR)/Random number generator
Update : 2025-01-10 Size : 111kb Publisher : sheldon01

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EV10AQ190A configuration program
Update : 2025-01-10 Size : 3.27mb Publisher : shck

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The code completes the memory data storage and reading function, the chip is a Atmel SPI interface EEPROM memory chip.
Update : 2025-01-10 Size : 6kb Publisher : leixiaoming

High speed AD configuration program, SPI Chinese data
Update : 2025-01-10 Size : 469kb Publisher : shck

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xilinx IP core library for modelsim simulate, based on ise 13.x, verified in modelsim10.
Update : 2025-01-10 Size : 15.4mb Publisher : asmreg

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this program is used to generate mif file used by xilinx memory ip core.
Update : 2025-01-10 Size : 4kb Publisher : asmreg

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this program is used to generate coe file used by xilinx memory ip core.
Update : 2025-01-10 Size : 4kb Publisher : asmreg

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an effective program for 8bit serial input CRC-8 ATM calculate.
Update : 2025-01-10 Size : 49kb Publisher : asmreg

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The bus system is based on FPGA chip. It adds digital tube display module, voice automatic reporting module and infrared communication module. The bus stop system adopts FPGA as the core of the main control chip, add LCD
Update : 2025-01-10 Size : 6.4mb Publisher : 幽山之隅

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The entire program module by heart rate sensor, temperature sensor module, 3D pedometer module, FPGA development board, A/D converter, LCD display etc..
Update : 2025-01-10 Size : 16.45mb Publisher : 幽山之隅
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