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VHDL-FPGA-Verilog list
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D flip-flop with synchronous 1 and asynchronous clear 0. Detailed explanation, easy to understand.
Update : 2025-01-12 Size : 2.82mb Publisher : 紫芩

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The Manchester code of the M sequence is personally validated.
Update : 2025-01-12 Size : 2.96mb Publisher : 紫芩

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The frequency division is carried out according to the chip frequency at all times, and the duty cycle is adjusted. Easy to implement.
Update : 2025-01-12 Size : 2.93mb Publisher : 紫芩

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Design of DDS based on FPGA
Update : 2025-01-12 Size : 50kb Publisher : hdu

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Data packet transfer source program, Chaos indicator for Lyapunov index calculation, Really is a good program.
Update : 2025-01-12 Size : 7kb Publisher : gingkangbou

Digital signal processing FPGA implementation, including the basic knowledge of FPGA, floating point operations, signal processing FIR, FFT, etc., the appendix contains the source code
Update : 2025-01-12 Size : 4.36mb Publisher : btty

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Verilog based I2C interface protocol code, support EEPROM
Update : 2025-01-12 Size : 1.41mb Publisher : 老杜123

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This is a four bit sequence detector, including three modes that can be selected: increment mode (detecting four consistency increment data), decrement mode (detecting four consistency decrement data) and steadiness mode
Update : 2025-01-12 Size : 1.77mb Publisher : LLawliet

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Digital frequency meter based on VHDL design, and later added a module to communicate with FPGA
Update : 2025-01-12 Size : 13.11mb Publisher : 羲曜

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The use of VHDL realize the counter counter, and in the digital tube to achieve display. The corresponding function can be implemented on the XILINX development board, and the simulation can also be realized.
Update : 2025-01-12 Size : 730kb Publisher : 勿要归晚

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it is the file which is named as starting KIT for Spartan 3E
Update : 2025-01-12 Size : 457kb Publisher : Saad_01

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This is the Spartan 3E tutorial.
Update : 2025-01-12 Size : 143kb Publisher : Saad_01
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