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VHDL-FPGA-Verilog list
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Vivado--设计流程指导手册-(含安装流程与仿真)
Downloaded:0
Vivado design flow guidance document, which contains software installation process and simulation process
Update
: 2025-01-12
Size
: 3.02mb
Publisher
:
bikey
新建文件夹
Downloaded:0
Verilog voice, FPGA produces DE, HS, VE signal
Update
: 2025-01-12
Size
: 1kb
Publisher
:
小麦穗
trafficlight
Downloaded:0
North South four road traffic lights
Update
: 2025-01-12
Size
: 5.78mb
Publisher
:
云白三
smg_IP
Downloaded:0
In the DE 2 development board, the preparation of VHDL language, the establishment of 8 sections of digital tube IP kernel, in Nios II written in C language program, to achieve the 8 section of digital tube digital displ
Update
: 2025-01-12
Size
: 9.09mb
Publisher
:
nsl123asd
UART-HPY
Downloaded:0
a useful UART decoder and encoder.
Update
: 2025-01-12
Size
: 47kb
Publisher
:
帕萨迪纳
cordic
Downloaded:0
Generating sin or cos function
Update
: 2025-01-12
Size
: 11.22mb
Publisher
:
ixupeng
FFT64DIF
Downloaded:0
Achieve fast Fourier operations at 64 points, and use Modelsim, matlab simulation.
Update
: 2025-01-12
Size
: 19.74mb
Publisher
:
chenmm
hua
Downloaded:0
The AD7810 controller written by Verilog has been verified by simulation
Update
: 2025-01-12
Size
: 2kb
Publisher
:
jxxymm
uart
Downloaded:0
Embedded serial communication, written using Verilog, altera development board on the run
Update
: 2025-01-12
Size
: 2.71mb
Publisher
:
歪歪mao
LIUXISOPC2
Downloaded:0
calculator SOPC FPGA
Update
: 2025-01-12
Size
: 42.84mb
Publisher
:
刘栖123
ModelCPU
Downloaded:0
The framework code that contains model machine design can be added manually
Update
: 2025-01-12
Size
: 1kb
Publisher
:
胡佳华
ethernet_test
Downloaded:0
Gigabit Ethernet communication based on FPGA, communication using GMII bus communication
Update
: 2025-01-12
Size
: 11.28mb
Publisher
:
lj120809769
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