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VHDL-FPGA-Verilog list
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DDS is implemented by look-up table, with MATLAB sampling
Update : 2025-01-13 Size : 43kb Publisher : 王亮

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Using Verilog HDL program to achieve infrared decoding digital display,the remote control presses the digital display on the digital board of the FPGA development board.
Update : 2025-01-13 Size : 486kb Publisher : 马东玉

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Static random access memory, which is a memory with a static access function, do not need to refresh the circuit that can save its internal storage of data.
Update : 2025-01-13 Size : 614kb Publisher : 马东玉

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Using the DIP switch to achieve four binary and four binary multiplier, the results are converted to decimal, and through the digital display.
Update : 2025-01-13 Size : 1.14mb Publisher : 王宁

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(2) the use of serial port to achieve the receiving function, and the received characters through the serial port to send to the serial port on the computer (1) the use of serial port to achieve the sending function, tha
Update : 2025-01-13 Size : 1.09mb Publisher : 王宁

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U57FA u4E8Everilog HDL u7684 u6570 u5B57 u6B63 u4EA4 u89E3 u8C03 u5B9E u73B0 uFF0C u4EFF u771F u7ED3 u679C u9A8C u8BC1 u6B3 u786E uFF0CIDE u4E3Avivado 2014
Update : 2025-01-13 Size : 76kb Publisher : 陈涛

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U57FA u4E8Everilog HDL u7684 u6570 u5B57 u6B63 u4EA4 uFF08 u8C03 u5236 uFF09FPGA u5B9E u73B0 uFF0C u4EFF u771F u7ED3 u679C u9A8C u8BC1 u6B63 u786E u3002vivado 2014
Update : 2025-01-13 Size : 82kb Publisher : 陈涛

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U57Fn
Update : 2025-01-13 Size : 4kb Publisher : 陈涛

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w25q64 spi flash verilog code .use xilinx ise .
Update : 2025-01-13 Size : 5.6mb Publisher : zhufull

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Design and Simulation of serial port sending module based on FPGA,portable code
Update : 2025-01-13 Size : 174kb Publisher : 王子珊

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Design of DAC driver for linear sequence machine and serial interface based on FPGA
Update : 2025-01-13 Size : 1.64mb Publisher : 王子珊

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this code is used to generate pulse
Update : 2025-01-13 Size : 3kb Publisher : 张旭
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