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VHDL-FPGA-Verilog list
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this is the program which can help to convert bcd code to excess3 code,the perfect circuitary has been given in this document which will lead you to understand it more properly.Reference is taken from morris mano book of
Update : 2025-04-03 Size : 276kb Publisher : jatab

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this project is based on jk and t flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used fo
Update : 2025-04-03 Size : 81kb Publisher : jatab

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this project is based on 8*3 encoder and 3*8 decoder using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can b
Update : 2025-04-03 Size : 139kb Publisher : jatab

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this project is based on 2*1 and 4*1 multiplexer and 1*2 and 1*4 demultiplexer using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access
Update : 2025-04-03 Size : 89kb Publisher : jatab

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this project is based on sr and d flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used fo
Update : 2025-04-03 Size : 201kb Publisher : jatab

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this project is based on half adder ,full adder,half subtractor and full subtractor using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to
Update : 2025-04-03 Size : 64kb Publisher : jatab

this project is based on 4bit binary to gray and gray to binary code converter using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to acces
Update : 2025-04-03 Size : 60kb Publisher : jatab

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FPGA-based implementation of a small multiple of sub-frequency code, widely used in digital communications.
Update : 2025-04-03 Size : 392kb Publisher : wang xiaobo

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Verilog state machine design-10010 Sequence Detector
Update : 2025-04-03 Size : 1kb Publisher : txj

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VHDL hardware description language and digital logic circuit design
Update : 2025-04-03 Size : 17.83mb Publisher : yolanda

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RISC (reduced instruction set computer) stored procedures source code of the state machine
Update : 2025-04-03 Size : 3kb Publisher : 李松

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This is verilog hardware description language code is compiled by five divider
Update : 2025-04-03 Size : 1kb Publisher : 李松
« 1 2 ... .82 .83 .84 .85 .86 3287.88 .89 .90 .91 .92 ... 4311 »
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