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VHDL-FPGA-Verilog list
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LCD
Downloaded:0
Written in VHDL, a display procedure, hoping that would help everyone a favor on the Hei hei.
Update
: 2025-03-31
Size
: 454kb
Publisher
:
shuwei
my_232
Downloaded:0
verilog 232 serial port transceiver program already had some success in the development of on-board test ^ ^
Update
: 2025-03-31
Size
: 586kb
Publisher
:
guoyishi
FPGApinlvji
Downloaded:0
The time of the year undergraduate graduate design, signal generator and frequency counter
Update
: 2025-03-31
Size
: 10kb
Publisher
:
zhanglei
cpu_16bit
Downloaded:0
design cpu 16 bits by verilog HDL.
Update
: 2025-03-31
Size
: 1kb
Publisher
:
tommy
vhdlclock
Downloaded:0
making a simple clock using altera vhdl
Update
: 2025-03-31
Size
: 2kb
Publisher
:
mantisar
fir_9222_sopc
Downloaded:0
Sopc technology-based digital equalizer band-pass filter and liquid crystal display 12864
Update
: 2025-03-31
Size
: 5.64mb
Publisher
:
z
wallace
Downloaded:0
it is a multiplier used in RIsc architecture based processor.......
Update
: 2025-03-31
Size
: 2.9mb
Publisher
:
sabaresh
Digital6Counter
Downloaded:0
Multi-functional digital clock vhdl fpaa
Update
: 2025-03-31
Size
: 377kb
Publisher
:
zhou
UART-CPLD
Downloaded:0
VHDL design UART
Update
: 2025-03-31
Size
: 6.01mb
Publisher
:
yuyue
qiangdaqi
Downloaded:0
Four Responder, has passed the compilation, simulation, including the answer in his identification, scoring, timing and digital display.
Update
: 2025-03-31
Size
: 2kb
Publisher
:
majianhui
spi_eeprom_conf
Downloaded:0
Spi interface to achieve the transfer, and multiple external EEPROM read and write data
Update
: 2025-03-31
Size
: 2kb
Publisher
:
guoguo
spi_master_phy
Downloaded:0
This is the spi interface transfer part of the contents of a total of three parts of this source, function: spi interface that the realization of the read and write data to the peripheral
Update
: 2025-03-31
Size
: 2kb
Publisher
:
guoguo
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.87
.88
.89
.90
.91
3292
.93
.94
.95
.96
.97
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4311
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