VHDL-FPGA-Verilog List Page 3325

VHDL-FPGA-Verilog list

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01 Downloaded：0: The VHDL language, for the EDA experiments traffic lights is designed to be a combination of hardware and software
Update : 2025-03-19 Size : 1kb Publisher : menghang
Led_7Seg Downloaded：0: 4-digit 7-segment digital tube VHDL program, 6MHz Crystal
Update : 2025-03-19 Size : 204kb Publisher : ye shuai
rotate_led_src Downloaded：0: The use of rotary switch control 8 LED cycle light directions, including the rotary switch (Consumer shake, a sense of direction) and the LED light module recycling. Use emacs+ iverilog development, enclosing gtkwave sim
Update : 2025-03-19 Size : 226kb Publisher : 孙斌
cnt10 Downloaded：0: VHDL language using a decimal counter, follow-up there is divider, data selector, seven-segment digital display procedures, the software platform is Quartus II 7.2, the final adoption of these small modules can be combin
Update : 2025-03-19 Size : 237kb Publisher : QQ
clk_div16 Downloaded：0: Written in VHDL language using a 1/16 divider, follow-up there is the counter, data selector, seven-segment digital display procedures, the software platform is Quartus II 7.2, the final adoption of these small modules c
Update : 2025-03-19 Size : 221kb Publisher : QQ
MUX2 Downloaded：0: Written in VHDL language using a 1/16 divider, follow-up there is the counter, data selector, seven-segment digital display procedures, the software platform is Quartus II 7.2, the final adoption of these small modules c
Update : 2025-03-19 Size : 225kb Publisher : QQ
display Downloaded：0: Written in VHDL language using a seven-segment digital tube display program, follow-up there is divider, data selector, counters procedures, software platform is Quartus II 7.2, the final adoption of these small modules
Update : 2025-03-19 Size : 229kb Publisher : QQ
shizhong Downloaded：0: A clock with the VHDL language program, the software platform is Quartus II 7.2, it is uploaded from the front of the small module combined production, suitable for beginners, through these procedures, new to VHDL learne
Update : 2025-03-19 Size : 399kb Publisher : QQ
count100 Downloaded：0: Written in VHDL language using a binary counter 100. The software platform is Quartus II 7.2, designed by the front of the small blocks together produced, suitable for beginners, through these procedures, new to VHDL lea
Update : 2025-03-19 Size : 315kb Publisher : QQ
Veriloglicheng Downloaded：0: This is a verilog some examples, very simple, more exchanges ah
Update : 2025-03-19 Size : 111kb Publisher : loginid
EP1K30TC144-3 Downloaded：0: EP1K30TC144-3 PDF. 1k30 FPGA-chip documentation, I spent some time on 1K30
Update : 2025-03-19 Size : 700kb Publisher : Deitel
FFT_matlab_hdl_code Downloaded：0: FFT : MATLAB and Verilog simulation
Update : 2025-03-19 Size : 47kb Publisher : 李风飞

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