VHDL-FPGA-Verilog List Page 3349

VHDL-FPGA-Verilog list

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!DDS_vhdl Downloaded：0: Using DDS (direct digital frequency synthesis) method, using VHDL written source
Update : 2025-03-19 Size : 106kb Publisher : 王岩嵩
cpsk Downloaded：0: VHDL hardware language using BPSK modulation and demodulation system, the preparation, simulation adopted, the source code
Update : 2025-03-19 Size : 67kb Publisher : 王岩嵩
fsk Downloaded：0: VHDL hardware language using FSK modulation and demodulation system, the simulation through the
Update : 2025-03-19 Size : 72kb Publisher : 王岩嵩
mult Downloaded：0: VHDL language used to write hardware multiplier, through the simulation result is correct
Update : 2025-03-19 Size : 181kb Publisher : 王岩嵩
AD Downloaded：0: Hardware language VHDL with the preparation of AD acquisition system, after a simulation result is correct
Update : 2025-03-19 Size : 156kb Publisher : 王岩嵩
DDS_spectrum_analysis Downloaded：0: FPGA based DDS DDS design with Word format
Update : 2025-03-19 Size : 532kb Publisher : chris
CComplex_CFourior Downloaded：0: Discrete Fourier transform realization of the basic functions: to construct a CFourior class object.
Update : 2025-03-19 Size : 9kb Publisher : feierala
ad80141_intf Downloaded：0: Verilog，实现AD80141
Update : 2025-03-19 Size : 1kb Publisher : 高波
multi Downloaded：0: multicycle bvbj vhdl
Update : 2025-03-19 Size : 1022kb Publisher : afzal74
ca Downloaded：0: Based on vhdl/verilog of the gps receiver pseudo-random code generation process. Simulation has been integrated.
Update : 2025-03-19 Size : 1kb Publisher : 包鼎华
fft2 Downloaded：1: 512 points, eight base 2fft program. Based on vhdl/verilog. Simulation layout has been adopted.
Update : 2025-03-19 Size : 20kb Publisher : 包鼎华
division1 Downloaded：0: Based on vhdl/verilog program for 18-bit divider. Has been simulation and synthesis.
Update : 2025-03-19 Size : 1kb Publisher : 包鼎华

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