VHDL-FPGA-Verilog List Page 3486

VHDL-FPGA-Verilog list

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CPLD Downloaded：0: EPM7218 prepared AHDL program and achieving LED control
Update : 2025-03-13 Size : 89kb Publisher : 李先生
SOPC_NIOS_TEST Downloaded：0: ALTER+ NIOS II+ SOPC_Builder+ NIOS II IDE routines (VHDL)
Update : 2025-03-13 Size : 10.12mb Publisher : cmlin
p_t_s_422 Downloaded：0: 422 serial communication used in parallel data to serial code, can combine the use of fifo
Update : 2025-03-13 Size : 1kb Publisher : 包宰
cpu_lynn Downloaded：0: Verilog realization of a simple single-threaded CPU, the composition of computer-based bibliography, clear lines of thought, a test platform.
Update : 2025-03-13 Size : 11kb Publisher : wei
fft_hdl Downloaded：0: A 16-point FFT is completed with the base 2 butterfly unit and has a test environment. -16 points FFT with a radix-2 butterfly computation unit is completed and test environment.
Update : 2025-03-13 Size : 21kb Publisher : wei
fft_1024_hdl Downloaded：0: A 1024-point FFT, Radix-4 butterfly structure operation, five water, ping-pong memory, a test environment.
Update : 2025-03-13 Size : 18kb Publisher : wei
fir_hdl Downloaded：0: Verilog a FIR filter to achieve, with the reference code generated by matlab mutual authentication.
Update : 2025-03-13 Size : 95kb Publisher : wei
viterbi_hdl Downloaded：0: Complete realization of the Viterbi algorithm coded transmission can be achieved there is noise codec part, and test environment.
Update : 2025-03-13 Size : 29kb Publisher : wei
lab2 Downloaded：0: DSM to build a module, to achieve the spartan-3e alarm function FPGA
Update : 2025-03-13 Size : 297kb Publisher : 田飞
VHDL Downloaded：0: VHDL常用的22个子程序源码,这有你们需要的代码
Update : 2025-03-13 Size : 24kb Publisher : lin
ramFIFO Downloaded：0: FIFO dual-port RAM procedures to achieve explanation. Good
Update : 2025-03-13 Size : 602kb Publisher : nxl
Matlab-m-sequence-generator Downloaded：0: Introduction of m-sequences and teach you how to use the matlab compiled m-sequence
Update : 2025-03-13 Size : 2.75mb Publisher : kean

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