VHDL-FPGA-Verilog List Page 3519

VHDL-FPGA-Verilog list

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QuartusIIVHDLDDS Downloaded：0: FPGA-based design of the DDS signal source of all content, you can display the output frequency
Update : 2025-03-12 Size : 4.3mb Publisher : 张松松
DDSsheji Downloaded：0: Recurrence of an amendment to improve the FPGA-based realization of the DDS signal source program
Update : 2025-03-12 Size : 253kb Publisher : 张松松
max5236 Downloaded：0: a program for AD-Wandler max5236 in VHDL Language
Update : 2025-03-12 Size : 3kb Publisher : caoerlin
ad7304 Downloaded：0: a program for AD-Wandler ad7304 in VHDL-Language
Update : 2025-03-12 Size : 5kb Publisher : caoerlin
xapp462_vhdl Downloaded：0: a example-Code for DCM in language VHDL
Update : 2025-03-12 Size : 14kb Publisher : caoerlin
lpm_ram Downloaded：0: Quartus the LPM_RAM based on examples, VHDL language, and through simulation testing
Update : 2025-03-12 Size : 216kb Publisher : a64577122
scramble Downloaded：0: Communication scrambling circuit VHDL Code
Update : 2025-03-12 Size : 1kb Publisher : 江山
CNT Downloaded：0: Sub-band description of the VHDL language, giant simple and practical, one can see, from 2-16 pm band has, ah good things.
Update : 2025-03-12 Size : 1kb Publisher : 江山
RS485EN Downloaded：0: Two-way RS485 communications, the headache is to this end they' ll pay attention to the students, this two-way communication you can solve many problems in the course of oh
Update : 2025-03-12 Size : 148kb Publisher : 江山
Half Downloaded：0: Half-integer frequency, the frequency may be distinguished x.5, we requested to look into other frequencies.
Update : 2025-03-12 Size : 1kb Publisher : 江山
viterbi Downloaded：0: verilog program to achieve the (2,1,4) convolutional code encoding, and algorithm based on the back of the Viterbi decoder
Update : 2025-03-12 Size : 3kb Publisher : xiongherui
shift_reg_ps Downloaded：0: this VHDL program can get a 64bit paralel data and make a serial data with SCLK and WCLK.
Update : 2025-03-12 Size : 1kb Publisher : Taher Aghazadeh

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