VHDL-FPGA-Verilog List Page 3522

VHDL-FPGA-Verilog list

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CombiningModuleSelection-ResourceSharingsynthesis Downloaded：0: combining module selection and resource sharing for vhdl and verilog designs
Update : 2025-03-11 Size : 167kb Publisher : kami
fb Downloaded：0: 1:1 duty cycle square wave of verilog procedures, counter can be changed by modifying the frequency and duty cycle
Update : 2025-03-11 Size : 172kb Publisher : zdy
1602_jp Downloaded：0: FPGA lcd display program, you can scan the keyboard input and display in lcd,
Update : 2025-03-11 Size : 467kb Publisher : zdy
led Downloaded：0: 51 single-chip FPGA led blinking and procedures. . . . . . . . . . . . .
Update : 2025-03-11 Size : 1kb Publisher : zdy
vga Downloaded：0: eda
Update : 2025-03-11 Size : 50kb Publisher : luantian
CIC_DEC Downloaded：0: CIC decimation filter design, CIC filter order of 8 times 5 samples.
Update : 2025-03-11 Size : 1kb Publisher : 42200306
CIC_DEC_3 Downloaded：0: CIC decimation filter design, CIC filter order 3 times 5 samples.
Update : 2025-03-11 Size : 1kb Publisher : 42200306
CIC_DEC_4 Downloaded：0: CIC extraction filter design, CIC filter adopts 5 - order 4 times extraction. -CIC decimation filter design, CIC filter order 4 times using 5 samples.
Update : 2025-03-11 Size : 1kb Publisher : 42200306
CIC_DEC_6 Downloaded：0: CIC decimation filter design, CIC filter stage 6 times 5 samples.
Update : 2025-03-11 Size : 1kb Publisher : 42200306
debussy_tutorial Downloaded：0: Engaged in a certain friend fpga design simulation for debugging the code the first large, debussy better now for us to save a lot of time, the annex is to introduce the use of debussy Guide, I hope all of you help
Update : 2025-03-11 Size : 409kb Publisher : 钟毓秀
quartus2-1 Downloaded：0: Based on a QuartusII Programming FPDA/QuartusII the computer components can be achieved Arithmetic (add, subtract, from plus 1, since the minus 1, multiplication, division) and logical operators (and, or, non-) and other
Update : 2025-03-11 Size : 1.94mb Publisher : 南才北往
mymux Downloaded：0: Based on FPGA/QuartusII of multiplication, and with a graphics file, you can run the simulation compiler is a good curriculum design your reference!
Update : 2025-03-11 Size : 138kb Publisher : 南才北往

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