VHDL-FPGA-Verilog List Page 357

VHDL-FPGA-Verilog list

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Digital-clock Downloaded：0: Based on FPGA digital tube digital clock function uses chip EP2C8Q208C8N, use digital display digital clock, using Verilog language programming, the present examples are engineering documents, simulation, waveform, teste
Update : 2025-01-17 Size : 1.16mb Publisher : 陈怡然
Buzzer-music Downloaded：0: Play music based on FPGA buzzer functions using chip EP2C8Q208C8N, using ordinary buzzer, since the frequency of different functions can be realized sing, in this case the design is " Auld Lang Syne" , using Veri
Update : 2025-01-17 Size : 1.37mb Publisher : 陈怡然
24DECODERDATA.v Downloaded：0: In digital electronics, a binary decoder is a combinational logic circuit that converts a binary integer value to an associated pattern of output bits. They are used in a wide variety of applications, including data demu
Update : 2025-01-17 Size : 13kb Publisher : ece
decoderGATELEVEL3.v Downloaded：0: An encoder is a device, circuit, transducer, software program, algorithm or person that converts information one format or code to another, for the purposes of standardization, speed or compressions.
Update : 2025-01-17 Size : 20kb Publisher : ece
encoder823.v Downloaded：0: An encoder is a device, circuit, transducer, software program, algorithm or person that converts information one format or code to another, for the purposes of standardization, speed or compressions.
Update : 2025-01-17 Size : 10kb Publisher : ece
encoderdflow823.v Downloaded：0: An encoder is a device, circuit, transducer, software program, algorithm or person that converts information one format or code to another, for the purposes of standardization, speed or compressions.
Update : 2025-01-17 Size : 10kb Publisher : ece
anjianjbujin Downloaded：0: Verilog button strp motor
Update : 2025-01-17 Size : 612kb Publisher : lr
fenpin Downloaded：0: Frequent FPGA to control stepping motor points
Update : 2025-01-17 Size : 426kb Publisher : lr
xapp524 Downloaded：1: xilinx FPGA ADC LVDS interface
Update : 2025-01-17 Size : 11.74mb Publisher : 郭述强
08-1_VGA_Display_Test_640480 Downloaded：0: Based on quartusII development environment of VGA video communication program, very good information, welcome to download
Update : 2025-01-17 Size : 142kb Publisher : 郑传生
09_SDRAM_VGA_Display_Test640480 Downloaded：0: Under the development environment of quartusII, write SDRAM VerilogHDL language communication program, welcome to download, this is based on Crazybingo board environment design
Update : 2025-01-17 Size : 322kb Publisher : 郑传生
fr_regen Downloaded：0: fr proce
Update : 2025-01-17 Size : 1kb Publisher : haozi

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