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VHDL-FPGA-Verilog list
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flash
Downloaded:0
flashing led example code
Update
: 2025-01-24
Size
: 87kb
Publisher
:
nattu
freqm
Downloaded:0
frequency multiplier
Update
: 2025-01-24
Size
: 82kb
Publisher
:
nattu
jc2_vhd
Downloaded:0
jhonson counter using shifter
Update
: 2025-01-24
Size
: 54kb
Publisher
:
nattu
hex2rom_0241_Win32
Downloaded:0
This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).
Update
: 2025-01-24
Size
: 94kb
Publisher
:
zhangdongqing
USB2.0IP
Downloaded:0
Complete Verilog language developed by USB2.0 IP core source code, including documentation
Update
: 2025-01-24
Size
: 202kb
Publisher
:
陈润
test1
Downloaded:0
4-digit Cymometer verilog HDL design, the accuracy of the quasi-comparison
Update
: 2025-01-24
Size
: 2kb
Publisher
:
邹润
testt2
Downloaded:0
By the MCU and CPLD together seven digital frequency meter
Update
: 2025-01-24
Size
: 2kb
Publisher
:
邹润
8080cpu
Downloaded:0
this is code for cpu 8080 design
Update
: 2025-01-24
Size
: 9kb
Publisher
:
minh
lcd
Downloaded:0
Sopc technology used for implementation of 128* 64 LCD lcd. Here is the procedure.
Update
: 2025-01-24
Size
: 1kb
Publisher
:
zlw
usb-driver
Downloaded:0
linux driver of Xilinx USB Platform cable, support xilinx usb cable and parallel cable, in addition, it support usb jtag based on FT2232!
Update
: 2025-01-24
Size
: 25kb
Publisher
:
gxliu
sin_sample_clock
Downloaded:0
EP2C CYCONLY series FPGA clock test procedure is determined by the internal clock frequency, the lamp lit digital display to prove. Absolute-to-use program. The preparation of the implementation of efficient
Update
: 2025-01-24
Size
: 649kb
Publisher
:
LILI
serial_uart_top_new
Downloaded:0
Series FPGA Cycloneii to test the serial communication program, the programming language is simple and serial rates are 115200bps, easy-to-use test
Update
: 2025-01-24
Size
: 142kb
Publisher
:
LILI
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.28
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3733
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