VHDL-FPGA-Verilog List Page 3731

VHDL-FPGA-Verilog list

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I2C_SLAVE Downloaded：0: I2C_SLAVER FPGA
Update : 2025-01-24 Size : 8kb Publisher : greyzhuang
check Downloaded：1: Verilog implementation using the sequence detector
Update : 2025-01-24 Size : 3kb Publisher : huhahuha
shift_register Downloaded：0: Using Verilog implementation of the shift register, you can achieve the left, shifted to right and other functions
Update : 2025-01-24 Size : 3kb Publisher : huhahuha
lbuff_mem Downloaded：0: delay code
Update : 2025-01-24 Size : 2kb Publisher : hungmin
autoseller Downloaded：1: Beverage vending machine. Writing vhdl variable with automatic procedures for the sale of goods.
Update : 2025-01-24 Size : 129kb Publisher : 朱宏亮
base_fir Downloaded：0: Use verilog to write the FIR filter, which have matlab and procedures, are down from the official website of the altera. . Everyone would like to swim.
Update : 2025-01-24 Size : 21kb Publisher : xiaoLEE
VHDL_USERGUIDE Downloaded：0: This guide is intended for the engineer who is familiar with the principles of hardware design, but has little experience in designing with a language-based synthesis system. It describes the general concepts of synthesi
Update : 2025-01-24 Size : 790kb Publisher : zhangheng
hdb3 Downloaded：0: vhdl
Update : 2025-01-24 Size : 1kb Publisher : 王英超
CAN_IP Downloaded：1: This a IP core of the CAN bus controller written by the Verilog HDL. whose structure is similar with SJA1000,supporting the protocol of CAN2.0B.
Update : 2025-01-24 Size : 60kb Publisher : 普林斯
wb_dma_latest.tar Downloaded：0: wb_dma_latest.tar.gz
Update : 2025-01-24 Size : 137kb Publisher : 磊
ac97_ctrl_latest.tar Downloaded：0: ac97_ctrl_latest.tar.gz source code
Update : 2025-01-24 Size : 89kb Publisher : 磊
ethmac10g_latest.tar Downloaded：0: ethmac10g_latest.tar.gz source code
Update : 2025-01-24 Size : 468kb Publisher : 磊

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