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VHDL-FPGA-Verilog list
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AlteraSdramIP
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Altera Sdram IP source code, VHDL written
Update : 2025-01-19 Size : 763kb Publisher : 张敏
xd_lcd_comp
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A 240* 128 LCD module in the ALTERA FPGA NIOS application, write your own AVALON Bus IP, including all source code can be easily used in NIOS for reference
Update : 2025-01-19 Size : 13kb Publisher : 张敏
yuyin
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In the FPGA to achieve the sound card interface, flower, filter comparators, the eventual realization of voice communications
Update : 2025-01-19 Size : 54kb Publisher : wangmixia
bianma
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VHDL language used to achieve 8-3 line encoder ,16-4-wire encoder
Update : 2025-01-19 Size : 1kb Publisher : wangmixia
ModelSim
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ModelSim is designed to simulate. RTF ModelSim design simulation. Rtf-modelsim simulation design. RTF
Update : 2025-01-19 Size : 1.57mb Publisher : xiao
VHDL
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VHDL reference routines- on procedures such as the DAC0832 Interface Circuit
Update : 2025-01-19 Size : 1.22mb Publisher : lixu
FFT
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On Fast Fourier Transform- FFT fast algorithm for the article.
Update : 2025-01-19 Size : 1.4mb Publisher : lixu
16X2-LCD-FPGA
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16x2 LCD display driver design of the FPGA.
Update : 2025-01-19 Size : 391kb Publisher : lixu
FPGA-DPLL
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FPGA-based realization of a new type of digital phase-locked loop
Update : 2025-01-19 Size : 177kb Publisher : lixu
Crack
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quartus ii 7.1 7.0crack
Update : 2025-01-19 Size : 570kb Publisher : lmn3951
hgb_pci_host
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There is a PCI from PCI proprietors, PCI TARGET is open source, is the project document, there is simulation project, for use. Feel good about the recommendation. The PCI_HOST currently supports: 1, on the target configu
Update : 2025-01-19 Size : 2.59mb Publisher :
2.TransferDemo
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The source described in detail a classic example of UART, please download, Thank you apply
Update : 2025-01-19 Size : 1.92mb Publisher : 张珂
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