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VHDL-FPGA-Verilog list
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vhdl testbench preparation, textio the preparation is a difficult, but also a focus, and this is my collection of articles on textio the article, at the same time with a simple note!
Update : 2025-01-19 Size : 1.27mb Publisher : horse

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basis of comparison of the tutorial Verilog Ha ha ah novice learn Rural U.S. Data Works
Update : 2025-01-19 Size : 284kb Publisher : zhangfuquan

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6 water, verilog realize the floating point adder, in which floating-point format in line with the IEEE754 standard
Update : 2025-01-19 Size : 2kb Publisher : 兰兰

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ModelSim using SystemC to do design verification methods and sample
Update : 2025-01-19 Size : 1.09mb Publisher : 邹积银

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Verilog example, there are more than 130, it is also useful, very helpful to novice
Update : 2025-01-19 Size : 160kb Publisher : 付铜

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EDA-based Digital code lock source code, used by the University Training
Update : 2025-01-19 Size : 7kb Publisher : shark

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VHDL language contains 100 examples, such as traffic light controllers, air-conditioning systems finite state automata, FIR filter, the fifth-order elliptic filter, alarm system control
Update : 2025-01-19 Size : 313kb Publisher : ttang

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8051 VHDL source code, mainly for beginners
Update : 2025-01-19 Size : 9.72mb Publisher : jerry

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FPGA-based multi-waveform generator based on multi-FPGA Waveform Generator
Update : 2025-01-19 Size : 1.02mb Publisher : 刘明吉

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dds digital shift Signal Generator, full-featured validated
Update : 2025-01-19 Size : 1.64mb Publisher : 刘明吉

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Storage oscilloscope, a full-featured validated, graduation design
Update : 2025-01-19 Size : 213kb Publisher : 刘明吉

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Sinusoidal signal generator (which can be swept) through the validation of sinusoidal signal generator
Update : 2025-01-19 Size : 58kb Publisher : 刘明吉
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