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VHDL-FPGA-Verilog list
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small verilogHDL entry procedures, the main function of the completion of decoding, from a 4 to 2 hexadecimal number into an 8-bit BCD you
Update : 2025-01-18 Size : 118kb Publisher : yhs

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This is a LED light up the VHDL procedure, let everyone together to share
Update : 2025-01-18 Size : 291kb Publisher : ljd20045002

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Commonly used with single-chip watchdog function, the procedures for using VHDL hardware language functions realize times.
Update : 2025-01-18 Size : 1kb Publisher : 姚大雷

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VHDL language using FPGA-based waveform generator. Does the need for experimental waveforms generated very useful.
Update : 2025-01-18 Size : 1.66mb Publisher : 姚大雷

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VHDL language used hardware realize the serial communication of test code that can be used to replace the work of single-chip serial port for testing.
Update : 2025-01-18 Size : 267kb Publisher : 姚大雷

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FPGA-based VHDL Programming realize a variety of audio signals, are used by companies fusion_startkit weeks Ligong development board.
Update : 2025-01-18 Size : 866kb Publisher : 姚大雷

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JPEG image compression standard works of VHDL realize that the document includes an image.
Update : 2025-01-18 Size : 254kb Publisher : 姚大雷

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altera company cpld/fpga development of software to use Chinese quartus2 Guide
Update : 2025-01-18 Size : 2.96mb Publisher : 郑洪波

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AD using high-speed storage oscilloscope design, based on EP1C3 board GWADDA board storage oscilloscope, which has the documentation
Update : 2025-01-18 Size : 1.01mb Publisher : 姚大雷

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Kabuki现rough cleaning转Connaught distance RGB to Y CbCr cavity VHDL Daitou Tungsten measurements 。
Update : 2025-01-18 Size : 267kb Publisher : 姚大雷

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Digital waveform memory VHDL source code, based on the Quartus II development.
Update : 2025-01-18 Size : 627kb Publisher : 姚大雷

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Application of VHDL language high stability crystal oscillator frequency to be 1pps, the use of GPS signals as a trigger of 1pps
Update : 2025-01-18 Size : 34kb Publisher : 党晓圆
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