VHDL-FPGA-Verilog List Page 3932

VHDL-FPGA-Verilog list

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senduard_50m Downloaded：0: Using VHDL realize CPLD (EPM240T100C5) Serial sending procedures
Update : 2025-01-18 Size : 189kb Publisher : ZXQ
lift_code_verilog Downloaded：1: Realize a 4-story single-elevator control system. Door can automatically switch can also manually switch. Code can be integrated, no more than drive the phenomenon.
Update : 2025-01-18 Size : 3kb Publisher : 幻婳
UART Downloaded：0: In VHDL on the preparation of a UART communication protocol, for FPGA development of great help
Update : 2025-01-18 Size : 140kb Publisher : 王忠
DCT_IDCT Downloaded：0: Discrete cosine transform and inverse discrete cosine transform of the HDL code and test files. Including VHDL and Verilog versions. And MEPG can use JPEG compression algorithm.
Update : 2025-01-18 Size : 29kb Publisher : caesar
huffman Downloaded：0: The huffman algorithm for FPGA HDL coding, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.
Update : 2025-01-18 Size : 10kb Publisher : caesar
quant Downloaded：0: Quantitative algorithm for FPGA HDL coding, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.
Update : 2025-01-18 Size : 14kb Publisher : caesar
iquant Downloaded：0: FPGA used to quantify anti-HDL coding algorithms, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.
Update : 2025-01-18 Size : 13kb Publisher : caesar
rle Downloaded：0: Variable-length encoding for FPGA HDL coding algorithms, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.
Update : 2025-01-18 Size : 4kb Publisher : caesar
zigzag Downloaded：0: 脫脙脫脷FPGA渭脛Z 卤盲禄炉脣茫篓渭脛HDL 卤脿脗毛拢卢掳眉脌篓 VHDL 录掳 Verilog
Update : 2025-01-18 Size : 7kb Publisher : caesar
zigzag_decode Downloaded：0: FPGA for the anti-Z transform algorithm of Verilog code. Can be used in JPEG and MPEG compression algorithms.
Update : 2025-01-18 Size : 3kb Publisher : caesar
main Downloaded：0: altera de2 sd card source. Debugging succe
Update : 2025-01-18 Size : 1kb Publisher : 娟娟
dds Downloaded：0: FPGA realization of the use of DDS, sine wave output, output frequency adjustable
Update : 2025-01-18 Size : 458kb Publisher : qlg

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