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VHDL-FPGA-Verilog list
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altera_solution
Downloaded:0
altera of timing constraints files, helpful
Update
: 2025-01-16
Size
: 1.32mb
Publisher
:
back1202
DE2_LCM_SRAM_PIC_DISPLAY
Downloaded:0
Under NIOS, the image is displayed on the LCD screen, and the full hardware implementation based on the DE2 board is now used to burn the image to SDRAM, which can then be displayed directly to the LCD screen.
Update
: 2025-01-16
Size
: 1.18mb
Publisher
:
刘赛
DS18B20FPGA
Downloaded:0
VHDL design of the measurement procedures DS18B20 welcome Please do not directly copy the test may not show.
Update
: 2025-01-16
Size
: 7kb
Publisher
:
aaaa
ADC0809_VHDL_ctrl
Downloaded:0
VHDL control ADC0809 chip realize after AD conversion and acquisition of reading and writing data.
Update
: 2025-01-16
Size
: 4kb
Publisher
:
zhou129
electoniclock
Downloaded:0
Abstract: the digital combination lock mainly complete the lock, password, the password verification, open electric lock, password changes, etc. The design of the digital combination lock circuit mainly includes 11 modul
Update
: 2025-01-16
Size
: 696kb
Publisher
:
孙光华
lock
Downloaded:0
This is my graduate program was originally designed eight binary code lock in the correct password to modify your password, enter the password shows the correct green tips, error display and alarm red tips.
Update
: 2025-01-16
Size
: 91kb
Publisher
:
孙光华
dds_vhdl
Downloaded:0
Function generator code, after an increase in the case of single-chip to achieve the general requirements of the function!
Update
: 2025-01-16
Size
: 2kb
Publisher
:
刘明明
FPGA-VHDL
Downloaded:0
FPGA hardware simulation program, the compiler environment QUARTER Ⅱ.
Update
: 2025-01-16
Size
: 482kb
Publisher
:
黄国江
D_machine_vhdl
Downloaded:0
IF statement with the design of D flip-flop, is relatively simple, but also very practical, beginners can
Update
: 2025-01-16
Size
: 2kb
Publisher
:
赵正鑫
choose_vhdl
Downloaded:0
First election for the Second Circuit, using IF statements, easy-to-use, very convenient, hoping to be helpful, thank you.
Update
: 2025-01-16
Size
: 2kb
Publisher
:
赵正鑫
one_in_four
Downloaded:0
Using CASE statement to design one circuit of the four elections, we can be assured that use, is simple and practical, hoping to be helpful.
Update
: 2025-01-16
Size
: 3kb
Publisher
:
赵正鑫
8bit_cample
Downloaded:0
This is used to design data stream 8-bit comparators, is simple and the use of, hoping to be helpful, thank you criticize guidance
Update
: 2025-01-16
Size
: 2kb
Publisher
:
赵正鑫
«
1
2
...
.99
.00
.01
.02
.03
4004
.05
.06
.07
.08
.09
...
4311
»
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