VHDL-FPGA-Verilog List Page 4085

VHDL-FPGA-Verilog list

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reg_add Downloaded：0: In the Quartus simulation procedures adopted by the transposition of the VHDL code
Update : 2025-01-12 Size : 511kb Publisher : 张学友
PWM_DCmotorControl Downloaded：0: The VHDL-based DC motor PWM control procedures.
Update : 2025-01-12 Size : 189kb Publisher : luoqianyou
CNT4B Downloaded：0: VHDL-based band of four asynchronous binary counter cleared.
Update : 2025-01-12 Size : 165kb Publisher : luoqianyou
EightBitDECcntr Downloaded：0: VHDL-based 8-bit decimal frequency of the detailed design.
Update : 2025-01-12 Size : 120kb Publisher : luoqianyou
source_verilog Downloaded：0: Basic Verilog module, a considerable number of functions,慢慢欣赏吧
Update : 2025-01-12 Size : 11kb Publisher : yucheng
fulladder Downloaded：0: Full adder, half adder and OR gate components. Components of sentence cases.
Update : 2025-01-12 Size : 12kb Publisher : 周林
qiangdaqi1 Downloaded：0: Answer the two devices, there are Answer, countdown, scorecards, ringing function.
Update : 2025-01-12 Size : 43kb Publisher : 周林
20044841 Downloaded：0: VHDL procedures for the preparation of a vending machine, you can achieve one or more of sales of goods
Update : 2025-01-12 Size : 266kb Publisher : 李寻
clock_VHDl Downloaded：0: The clock to write a beginners program, VHDL language, MAXPLUS environment.
Update : 2025-01-12 Size : 6kb Publisher : 朱涛
aqusition Downloaded：0: err
Update : 2025-01-12 Size : 1kb Publisher : 王强强
counter Downloaded：0: VHDL counter TestBench, suitable for beginners
Update : 2025-01-12 Size : 1kb Publisher : hbsun
uart_51 Downloaded：0: 8051 agreement in line with the norms of the Verilog source code UART. The Compression Pack is a ModelSim project.
Update : 2025-01-12 Size : 41kb Publisher : 王亮

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