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VHDL-FPGA-Verilog list
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usb1_funct
Downloaded:0
usb1.1 verilog the source code. Simulation and test document, and now it is very difficult to find the paper test testbench
Update
: 2025-01-09
Size
: 51kb
Publisher
:
liuzefu
dzzh
Downloaded:0
EDA curriculum design: digital clock- vhdl language all source code
Update
: 2025-01-09
Size
: 1kb
Publisher
:
王伯燕
simple_fifo
Downloaded:0
verilog HDL original code a simple synchronous FIFO original code, which can be integrated
Update
: 2025-01-09
Size
: 1kb
Publisher
:
zxz
m68_k
Downloaded:0
motorola VHDL description m68k
Update
: 2025-01-09
Size
: 6kb
Publisher
:
zhaolei
VHDL_100_example
Downloaded:0
comprehensive VHDL example, are the practical work experience, the essence of the essence for use directly. standing on the shoulders of our predecessors, see farther!
Update
: 2025-01-09
Size
: 6.33mb
Publisher
:
曾某人
lxh_xulijianceqi
Downloaded:0
This is a sequence detector, can detect repeat sequence, in communications with the more
Update
: 2025-01-09
Size
: 1kb
Publisher
:
李湘宏
loadGIF
Downloaded:0
use sdk read GIF files need vgsdk corresponding to the operation of the project
Update
: 2025-01-09
Size
: 936kb
Publisher
:
bjackdl
clock_top2
Downloaded:0
figures minute vhd files, individuals still feel pretty good, we can improve downloaded together.
Update
: 2025-01-09
Size
: 2kb
Publisher
:
john
spant
Downloaded:0
a spantan3 achieved in the 24-way frequency VHDL procedures, simple, and the hardware circuits once ran can be used directly. Can be further modified as PWM procedures.
Update
: 2025-01-09
Size
: 1kb
Publisher
:
林海
firfpga
Downloaded:0
FPGA using digital signal processing, distributed algorithm plays a key role with the traditional product-plot structure compared with the efficient parallel processing features. Based on a detailed study of the FPGA, us
Update
: 2025-01-09
Size
: 223kb
Publisher
:
yaoming
DCFQ
Downloaded:0
classic triggers for beginners will be very useful and hope more exchanges under.
Update
: 2025-01-09
Size
: 109kb
Publisher
:
小令
ASYfifo
Downloaded:0
procedures, development tools or QUartus ISE.
Update
: 2025-01-09
Size
: 1kb
Publisher
:
黄德勇
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