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VHDL-FPGA-Verilog list
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FIFO verilog CODE
Update : 2025-01-21 Size : 34kb Publisher : 秦天

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FIFO based on source code and test files ISE14, Verilog language, the whole works.
Update : 2025-01-21 Size : 405kb Publisher : 期望

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ML505 development platform for test engineering (embedded systems implementation), the whole works.
Update : 2025-01-21 Size : 5.06mb Publisher : 期望

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Evaluation Kit for PCIe-sp605 xilinx verilog source (which has been commissioning)
Update : 2025-01-21 Size : 6.35mb Publisher : 期望

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This file contains the company s ml505 FPGA Xilinx bit code and configuration files, you can directly download
Update : 2025-01-21 Size : 384kb Publisher : 期望

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100example of vhdl
Update : 2025-01-21 Size : 6.65mb Publisher : weiminxiongqi

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SPI VHDL
Update : 2025-01-21 Size : 3kb Publisher : bai

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More practical SPI Verilog programming, which has simulation timing and source code, simple and can be directly altered, supports SPI dual mode.
Update : 2025-01-21 Size : 289kb Publisher : 田勇

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This source code in an FPGA can be used as SPI host transmission code, if separated by time, this source will be very convenient, easy to understand
Update : 2025-01-21 Size : 3.65mb Publisher : 田勇

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This code is a sub 64-way switch, via the serial control switch off specific, simple, clear
Update : 2025-01-21 Size : 11.4mb Publisher : 田勇

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7-segment display counter counts the number of source code is simple, clear
Update : 2025-01-21 Size : 1kb Publisher : 田勇

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Classic rs232 serial Verilog source code, the crystal can be altered depending on the circumstances, the code style is very clear, clear!
Update : 2025-01-21 Size : 2kb Publisher : 田勇
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