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VHDL-FPGA-Verilog list
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FSM
Downloaded:1
Sequence detector using a shift register implementation, detection of a specific sequence 101011
Update
: 2025-01-22
Size
: 1kb
Publisher
:
赵健
Synchronous
Downloaded:0
Synchronous adding counters, D flip-flop implemented using binary counter
Update
: 2025-01-22
Size
: 1kb
Publisher
:
赵健
ren_gen
Downloaded:0
xilinx vhdl code for random number generator and prime number check. it can be used for cryptography
Update
: 2025-01-22
Size
: 5.75mb
Publisher
:
chandrapal singh
Asynchronous
Downloaded:0
Asynchronous adding counter using D flip-flop to achieve binary counter
Update
: 2025-01-22
Size
: 1kb
Publisher
:
赵健
water_led
Downloaded:0
Verilog language to achieve water lights on the FPGA.
Update
: 2025-01-22
Size
: 973kb
Publisher
:
陈图桓
Mojo-FSM
Downloaded:0
Finit state machine proce
Update
: 2025-01-22
Size
: 265kb
Publisher
:
Sat
sell-machine
Downloaded:0
verilog vivado xilinx
Update
: 2025-01-22
Size
: 666kb
Publisher
:
Cht
fenpin
Downloaded:0
process m sequence with 2Ask includes frequency divider, m sequence generator, sine signal generator and MUX
Update
: 2025-01-22
Size
: 1.14mb
Publisher
:
changquan
ppv2
Downloaded:0
pipeline with MIPS implementation, using verilog. Resolve conflicts pipeline.
Update
: 2025-01-22
Size
: 4.79mb
Publisher
:
勿苛刻
cf_ad9129_ebz_edk_14_4_2013_03_12.tar
Downloaded:0
verification of AD9129-EVB based on FPGA
Update
: 2025-01-22
Size
: 24kb
Publisher
:
木子
shumaguan
Downloaded:0
Seven-segment LED driver, the DE2 board to enter numbers by toggle switch in the digital tube display
Update
: 2025-01-22
Size
: 280kb
Publisher
:
李西平
step_motor_fenpin
Downloaded:0
Stepper motor drive, using Verilog language crossover method designed to achieve has been rotated.
Update
: 2025-01-22
Size
: 430kb
Publisher
:
李西平
«
1
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.34
.35
.36
.37
.38
539
.40
.41
.42
.43
.44
...
4311
»
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