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VHDL-FPGA-Verilog list
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uart_server
Downloaded:0
24 way serial ports to 1 serial port, including FIFO module,RX module,TX module, timer module, detection and control module, etc.. Verilog preparation
Update
: 2025-01-22
Size
: 371kb
Publisher
:
wangyu
m6502
Downloaded:0
m6502 6 bit microprocessor
Update
: 2025-01-22
Size
: 798kb
Publisher
:
Zero
fistnoc
Downloaded:0
VHDL CODE, WILL GIVE DESIGN ABOUT NETWORK ON CHIP
Update
: 2025-01-22
Size
: 8.41mb
Publisher
:
elango
Nixietube_count
Downloaded:0
count number in nixie tube
Update
: 2025-01-22
Size
: 330kb
Publisher
:
李强
Caculator
Downloaded:0
Verilog language based on simple calculator, to achieve the operation of addition and subtraction, there are modules and constraint files.
Update
: 2025-01-22
Size
: 13kb
Publisher
:
杨逍
verilog_code_for_double_fpu
Downloaded:0
64-bit FPU, embedded testbench, simulation has been validated.
Update
: 2025-01-22
Size
: 115kb
Publisher
:
张邈
HAPF_SLAVE2
Downloaded:1
SVG high voltage chain of verilog FPGA control procedures, including SPI, 16 road SCI synchronous communication module procedures to protect the self-locking function program, based on the detection and reactive power co
Update
: 2025-01-22
Size
: 17kb
Publisher
:
iic
Downloaded:0
i2c interface function implementation code, written in VERILOG, along with testbench
Update
: 2025-01-22
Size
: 522kb
Publisher
:
jianglei
uart
Downloaded:0
Serial implementation code written using verilog, together with simulation files.
Update
: 2025-01-22
Size
: 978kb
Publisher
:
jianglei
sdram_mdl
Downloaded:0
SDRAM-based literacy commissioning tests, using verilog language, through debugging.
Update
: 2025-01-22
Size
: 2.18mb
Publisher
:
jianglei
fenpin
Downloaded:1
The program is the input clock frequency, here is changing the division multiples, this is one eighth the frequency of the program
Update
: 2025-01-22
Size
: 253kb
Publisher
:
孙乐
YCbCr_camera
Downloaded:0
Image format conversion
Update
: 2025-01-22
Size
: 14.38mb
Publisher
:
刘强
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.39
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4311
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