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VHDL-FPGA-Verilog list
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ez_usb_write
Downloaded:0
FPGA writer to within 68,013
Update
: 2025-01-22
Size
: 4.66mb
Publisher
:
whd
SourceCode
Downloaded:0
68013 read content within sdram Firmware
Update
: 2025-01-22
Size
: 3mb
Publisher
:
whd
time
Downloaded:0
Verilog language, the method of the dividing timer is displayed on the digital display 0-59 seconds.
Update
: 2025-01-22
Size
: 543kb
Publisher
:
刘欣
UART(Verilog)
Downloaded:0
Verilog UART
Update
: 2025-01-22
Size
: 1.7mb
Publisher
:
ouhongshi
sram_test
Downloaded:0
SRAM Verilog
Update
: 2025-01-22
Size
: 1kb
Publisher
:
ouhongshi
S6_LCD_VHDL
Downloaded:0
LCD VHDL
Update
: 2025-01-22
Size
: 496kb
Publisher
:
ouhongshi
LCD-Verilog
Downloaded:0
LCD Verilog
Update
: 2025-01-22
Size
: 2kb
Publisher
:
ouhongshi
div10_test
Downloaded:0
DIV10 Verilog
Update
: 2025-01-22
Size
: 1.74mb
Publisher
:
ouhongshi
LCD1602
Downloaded:0
Verilog language CPLD control LCD custom output procedures, can be simulated, can be converted to circuit schematics.
Update
: 2025-01-22
Size
: 360kb
Publisher
:
王志
chuankou
Downloaded:0
UART Verilog serial port and computer communications multi byte communication program
Update
: 2025-01-22
Size
: 272kb
Publisher
:
王志
LCD12864
Downloaded:0
Simple 12864 program
Update
: 2025-01-22
Size
: 269kb
Publisher
:
王志
liushuideng
Downloaded:0
Basic flow light control procedures, simple control functions
Update
: 2025-01-22
Size
: 162kb
Publisher
:
王志
«
1
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.26
.27
.28
.29
.30
531
.32
.33
.34
.35
.36
...
4311
»
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