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VHDL-FPGA-Verilog list
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achieve VGA display with electronic clock basys2 development board, accurate to the second
Update : 2025-01-22 Size : 4.62mb Publisher : 程晓

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Design a simple RISC processor architecture multi-cycle instruction decoder decoding instructions to complete the assigned 6.
Update : 2025-01-22 Size : 82kb Publisher : 陈艳丽

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dont open, this is useless program
Update : 2025-01-22 Size : 303kb Publisher : atek

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pcie_xapp859 learning experience to help you learn xilinx of pcie
Update : 2025-01-22 Size : 14kb Publisher : 刘振

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8 bit processor for example
Update : 2025-01-22 Size : 237kb Publisher : Dimon

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DVI demo write by Verilog-HDL,test by modelsim.
Update : 2025-01-22 Size : 1.57mb Publisher : 周开元

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Implement programs based on Verilog keys for beginners learning program based development board
Update : 2025-01-22 Size : 240kb Publisher : jimm

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Verilog-based buzzer experimental procedure for applying for beginners
Update : 2025-01-22 Size : 257kb Publisher : jimm

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FPGA program for driving linear CCD, the corresponding Toshiba linear CCD, with only minor modifications can be used for other two-phase linear CCD
Update : 2025-01-22 Size : 59kb Publisher : whd

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LCD12864 Chinese character display, using Verilog achieve control LCD12864 display Chinese characters
Update : 2025-01-22 Size : 373kb Publisher : jimm

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usb2.0+ FPGA+ SDRAM set of test procedures
Update : 2025-01-22 Size : 4.5mb Publisher : whd

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Verilog language-based clock function, regulate the time, alarm clock and other functions
Update : 2025-01-22 Size : 484kb Publisher : jimm
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