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VHDL-FPGA-Verilog list
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Development board with a small example we can see, MATBLE the following test
Update : 2025-01-22 Size : 38kb Publisher : nsq

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塞琳思 development board you can download a small example of enlightening look at the series of flint
Update : 2025-01-22 Size : 165kb Publisher : nsq

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Privileged students BJ-EPM240 CPLD development board supporting the video source files, ex1 ~ ex15 whole, is the first choice of entry Verilog.
Update : 2025-01-22 Size : 7.05mb Publisher : liuz

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Program to access EEPROM using I2c VHDL
Update : 2025-01-22 Size : 27.73mb Publisher : ali

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Basic experiment multiplexer _02_ multi-channel solution: 4 channel 8 bits with tri-state outputs
Update : 2025-01-22 Size : 290kb Publisher : luhairong

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Basic experiment _07_ latch: a latch and a transparent latch
Update : 2025-01-22 Size : 241kb Publisher : luhairong

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Basic experiment _08_ trigger: D, T flip-flop
Update : 2025-01-22 Size : 255kb Publisher : luhairong

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Basic experiment _09_ counter: touch 4, 8, 16, counter each one
Update : 2025-01-22 Size : 288kb Publisher : luhairong

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Basic experiment _10_ shift register: common ordinary shift register
Update : 2025-01-22 Size : 217kb Publisher : luhairong

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Basic experiment _11_ shift register: linear feedback shift register
Update : 2025-01-22 Size : 256kb Publisher : luhairong

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Basic experiment _12_ finite state machine: Moore type sequence detector
Update : 2025-01-22 Size : 296kb Publisher : luhairong

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This implementation is based on the article Asynchronous FIFO
Update : 2025-01-22 Size : 1kb Publisher : 张牡丹
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