VHDL-FPGA-Verilog List Page 524

VHDL-FPGA-Verilog list

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QPSK Downloaded：0: Quadrature phase shift keying, QPSK modulation and demodulation of the design, the simulation code to demodulate the correct information
Update : 2025-01-22 Size : 935kb Publisher : chenwei
FPGA_daohang Downloaded：0: Some FPGA code, there are a lot of code is worth your consideration, I am finishing a week, get
Update : 2025-01-22 Size : 1.5mb Publisher : 杨云飞
fpga_sin_fangbo_vga_sanjiaobo Downloaded：1: FPGA as DDS, triangle wave, square wave, sine wave, then you can then VGA detailed notes on the inside, has simulation, verification, testing shows
Update : 2025-01-22 Size : 6.1mb Publisher : 杨云飞
NCO_DDS Downloaded：0: Write your own code, using a combination of NCO nuclear DDS, tested, we hope to help
Update : 2025-01-22 Size : 5.18mb Publisher : 杨云飞
new_2ask Downloaded：0: Do curriculum design written about 2ASK modulation and demodulation, which tested the code, intact
Update : 2025-01-22 Size : 2.93mb Publisher : 杨云飞
PLL_myprj Downloaded：0: Do FPGA phase-locked loop, which uses a lot of IP cores, detailed notes, I hope you like
Update : 2025-01-22 Size : 5.87mb Publisher : 杨云飞
vga_1 Downloaded：0: VGA driver source code is on the VGA preliminary, to help novice, there are questions you can contact me
Update : 2025-01-22 Size : 3.2mb Publisher : 杨云飞
vga_2 Downloaded：0: VGA dot matrix concept, the concept is to use lattice microcontroller, FPGA Play
Update : 2025-01-22 Size : 3.07mb Publisher : 杨云飞
vga_3 Downloaded：0: VGA layer concept of the FPGA can well understand VGA works
Update : 2025-01-22 Size : 3.52mb Publisher : 杨云飞
VHDL-Multi-fuction-Clock Downloaded：0: The design of a multi-function digital clock, required to display format for hours: Minutes: seconds, the whole point timekeeping and timer for 10 seconds, namely the whole point of 10 seconds before start timekeeping pr
Update : 2025-01-22 Size : 7.3mb Publisher : 冯雨娴
MCU2FPGA_SPI_TB Downloaded：0: The program uses the Verilog language design SPI interface, you can burn directly communicate with the FPGA, MCU, comes with a test file.
Update : 2025-01-22 Size : 4kb Publisher :
dm9000a_init Downloaded：0: In QUARTUS development environment, verilog realize dm9000a initialization
Update : 2025-01-22 Size : 2.67mb Publisher : 孟晗

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