VHDL-FPGA-Verilog List Page 630

VHDL-FPGA-Verilog list

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FPGAPVC Downloaded：0: PCI-based LED Marquee, PC lit LED marquees, PLX9054 bridge chip
Update : 2025-01-27 Size : 2.63mb Publisher : 大兵丶将
FPGAPVC_2 Downloaded：0: PCI-based data transmission source, PC for VC preparation, bridge chip for PLX9054, the project has been done, upload 5 routines, has been verified by
Update : 2025-01-27 Size : 20.71mb Publisher : 大兵丶将
FPGAPVC_3 Downloaded：0: SDRAM, PCI-based acquisition, PC for VC preparation, bridge chip for PLX9054, the project has been done, upload 5 routines, has been verified by
Update : 2025-01-27 Size : 8.5mb Publisher : 大兵丶将
FPGA_4 Downloaded：0: No PCI controlled LED marquees, this routine is relatively simple, mainly used to verify that the FPGA to work
Update : 2025-01-27 Size : 159kb Publisher : 大兵丶将
FPGA_5 Downloaded：0: No SDRAM, PCI capture, given FPGA PCI acquisition program, bridge chips for PLX9054, has been verified by
Update : 2025-01-27 Size : 4.42mb Publisher : 大兵丶将
ALL_6 Downloaded：2: This the total project folder files, including schematics, PCB, PC VC, the driver, the next crew FPGA program can be used as the development board, LVDS collection development board, front upload 5 digit five test proced
Update : 2025-01-27 Size : 1.19mb Publisher : 大兵丶将
MUSIC_PLAYER Downloaded：0: You can play four songs, set play, next, reset three keys. Press the play button to play the current song, button next to play the next song. LED0 indication play situation (when playing lights), LED2 and LED3 indicates
Update : 2025-01-27 Size : 17.77mb Publisher : 张斯佳
UPPER-BODY-MOTION-TRACKING Downloaded：0: realtime upper body motion tracking based on FPGA
Update : 2025-01-27 Size : 105kb Publisher : xiongke
led1 Downloaded：0: The scope of this document is, to define the content of the physical layer and the basic characteristics of the physical medium, for communication according to the Controller Area Network protocol specification (CAN) bet
Update : 2025-01-27 Size : 1kb Publisher : zhang yang
The-decoder Downloaded：0: Program 38 decoder based on the FPGA, very suitable for learning to use primary rookie entry procedures, are welcome to download the learning
Update : 2025-01-27 Size : 185kb Publisher : zhang yang
code Downloaded：0: FPGA multiplier based procedures, very suitable for learning to use primary rookie entry procedures, are welcome to download the learning
Update : 2025-01-27 Size : 34kb Publisher : zhang yang
thecode Downloaded：0: FPGA multiplexer based procedures, very suitable for learning to use primary rookie entry procedures, are welcome to download the learning
Update : 2025-01-27 Size : 33kb Publisher : zhang yang

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