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VHDL-FPGA-Verilog list
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Lab5
Downloaded:0
This a non-synchronous triggering of VHDL, click to clear the circuit and synchronization trigger, click to clear the circuit design
Update
: 2025-01-31
Size
: 2.13mb
Publisher
:
music_ic
Downloaded:0
This the music of IC design VHDL, designed by Max Plus II results will be displayed.
Update
: 2025-01-31
Size
: 396kb
Publisher
:
Elham-Zahraei-Salehi_-Sina-Saharkhiz-(1)
Downloaded:0
here it is a file which is consist of design of a MIPS pipeline in verilog, it also has test part an it work perfectly. the code is written in good way to understand it easily
Update
: 2025-01-31
Size
: 147kb
Publisher
:
eli
zynq_IP
Downloaded:0
this a example for ZYNQ 7
Update
: 2025-01-31
Size
: 1.3mb
Publisher
:
祝清瑞
flash_keymux
Downloaded:0
M25P40 flash
Update
: 2025-01-31
Size
: 2.4mb
Publisher
:
李俊
key_board
Downloaded:0
A nice fpga receive ps2 keyboard program
Update
: 2025-01-31
Size
: 545kb
Publisher
:
qi
C5G_AD_DA_hsmc
Downloaded:0
The latest generation C5 on altera development board DA, AD conversion data
Update
: 2025-01-31
Size
: 1.9mb
Publisher
:
qi
C5G_ADC_GRAPHIC_1110
Downloaded:0
C5 on the latest generation of altera development board HDMI display information
Update
: 2025-01-31
Size
: 9.04mb
Publisher
:
qi
quartus-II
Downloaded:0
Quartus II realized by the respondent timer settings, roughly the time display function, countdown reminder, the pause button and so on.
Update
: 2025-01-31
Size
: 474kb
Publisher
:
边松林
SOC
Downloaded:0
SOC AMBA bus interface code for understanding AHB APB protocol
Update
: 2025-01-31
Size
: 12.18mb
Publisher
:
舒洲
p37x_processor_skeleton
Downloaded:0
this is a code of a 8-bit preocessor
Update
: 2025-01-31
Size
: 34kb
Publisher
:
jimish
I2S
Downloaded:0
I2S example is existing at that file
Update
: 2025-01-31
Size
: 25kb
Publisher
:
fatih mercimek
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