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VHDL-FPGA-Verilog list
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SDH
Downloaded:0
SDH VHDL
Update
: 2025-01-31
Size
: 171kb
Publisher
:
real
tel
Downloaded:0
Telephone subscriber signaling controller based on VHDL
Update
: 2025-01-31
Size
: 36kb
Publisher
:
real
PCM
Downloaded:0
PCM stream slot signal generation module based on VHDL
Update
: 2025-01-31
Size
: 33kb
Publisher
:
real
decoder
Downloaded:0
The seven segment decoder implementations of VHDL
Update
: 2025-01-31
Size
: 32kb
Publisher
:
real
check
Downloaded:0
11100 stream detection module based on VHDL
Update
: 2025-01-31
Size
: 35kb
Publisher
:
real
counter
Downloaded:0
Decade counter with asynchronous reset
Update
: 2025-01-31
Size
: 32kb
Publisher
:
real
test2
Downloaded:0
This program is the Chinese character " positive" the source, use only for learning and communication, inappropriate, hope correction!
Update
: 2025-01-31
Size
: 1kb
Publisher
:
cc
main
Downloaded:0
demux impelementation for vhdl muxing protocol
Update
: 2025-01-31
Size
: 3kb
Publisher
:
lst__0
1
Downloaded:0
Signal generator VHDL implementation to achieve produce a signal
Update
: 2025-01-31
Size
: 1kb
Publisher
:
mike
DE2_Default-source
Downloaded:0
Altera FPGA DE2 Default Project File
Update
: 2025-01-31
Size
: 150kb
Publisher
:
koko
core
Downloaded:0
The converter circuit about serial to parrel, including testbench.
Update
: 2025-01-31
Size
: 1kb
Publisher
:
Dante.W
DOT_LED
Downloaded:0
dot led
Update
: 2025-01-31
Size
: 1kb
Publisher
:
leo
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.58
.59
.60
.61
.62
663
.64
.65
.66
.67
.68
...
4311
»
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