Description: Eight test vectors (Test_Bench) and example of waveform generator (VHDL language, development environment: FPGA)
- [email] - email program by vc
- [VHDL_TESTBENCH] - how to use VHDL to write VHDL simulation
- [PCMCIACPLD] - PCMCIA-based platform Samsung2410 the DM
- [testedma] - EDMA functional test procedures, an expe
- [jtag] - Verilog realize the jtag TAP, carried op
- [Test_Bench] - Waveform generator. Classic dual-process
- [rs_encode] - This is the verilog prepared using RS (2
- [testbench] - Learning materials, how to prepare testb
- [RS_5_3_GF256] - NAND FLASH CONTROLLER for ecc modules in
- [inputoutput_textio] - testbench for text_io,it is very useful,
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