rs_encode This is the verilog prepared using RS (2 - CodeBus

Welcome！[Sign In] ！[Sign Up]！

Front-page it | Collect it | [中国-简体中文]

FAQ Fav

Location:

Multimedia program

Streaming Mpeg4

Title: rs_encode

Category:
Streaming_Mpeg4
Tags:
[VHDL] [源码]
File Size:
2kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
gmoll

Description: This is the verilog prepared using RS (204,188) code, the application of digital television in the course of the BCH code.

Downloaders recently: [More information of uploader gmoll]

To Search: vhdl code for RS Code bch VHDL bch verilog code 204 188 bch code in verilog

[lecture6BCHCodes] - BCH code documentation, written by the p
[BCH_codec] - BCH codecs of the source code, code leng
[Test_Bench] - Eight test vectors (Test_Bench) and exam
[RSencode] - Contains RS (10,8) of the Verilog source
[RSencoder] - Rs encoder code on the relevant procedur
[bch9.1] - This is what I do a BCH decoding hardwar
[viterbi] - verilog program to achieve the (2,1,4) c
[Bch15_5] - The attached file consists of implimenta
[reed_solomon_decoder_latest.tar] - reed solomon (204,188). in verilog.

File list (Check if you may need any files):

rs_encode.v

CodeBus www.codebus.net

“CodeBus” is the largest source code store in internet!

1999-2018 CodeBus All Rights Reserved.