Description: Verilog HDL, prepared by four digital tube dynamic display procedures, the external circuit with CPLD to realize
- [cpld] - Interface design between microprocessor
- [FPGA_drives_LED] - the compressed file contains : VHDL use
- [key] - A 4* 4 matrix keyboard interface program
- [100examples] - Some simple examples of VHDL, mainly to
- [SystemOfTaxiFeeBasedOnVerilogHDL] - Abstract: Shanghai taxi meter as an exam
- [VGA] - Used to realize the occurrence VGA timin
- [alarm] - 1.6 Digital control of dynamic scanning
- [TIMER] - 6 digital tube digital clock showed that
- [SEG7_Timer] - Seven-segment digital tube display clock
- [VEDA7LED] - By QUARTUS II 7.2 (32-BIT) tools to achi
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