Description: 6 digital tube digital clock showed that zero-side, using hierarchical design approach to the preparation of
To Search:
- [11223344scan_led1000] - Quartus environment under the 1000 count
- [ex5-1] - It is a production of the 8051 Digital C
- [vhdl_led] - seven of the digital control experiments
- [segment2] - Four dynamic refresh digital tube displa
- [VHDL-timer] - This is a clock on the VHDL source code,
- [DTXS] - Verilog HDL, prepared by four digital tu
- [stopwatch] - Stopwatch timer can be used to compile t
File list (Check if you may need any files):
TIMER.vhd
Download