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 Description: Two of the projects themselves to do: a tracking radar simulator is based on FPGA/CPLD
 Downloaders recently: [More information of uploader kevin211]
  • [filtercode.Rar] - using Verilog filter function to achieve
  • [xunishiboqi] - vc series of virtual oscilloscope, sourc
  • [SIN_fashengqi] - 2006altera race-based soft-core Nios wid
  • [lwip_chinese] - TCP/IP protocol stack lwip Design and Im
  • [sip_explain] - This PPT is popular on the SIP protocol
  • [USBcomm] - fpga usb interface system design example
  • [QPSKvhdl] - QPSK modulation and demodulation of the
  • [HH] - This is a simulation of Hodgkin-Huxley e
  • [fir] - Verilog compiled fir filter, input param
  • [range-doppler-new] - range doppler for three objectsrange dop
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