Description: USART the Verilog code. rar, including many of the FPGA ip source, can be applied directly uart_vhdl.zipsl811usb contains the source code. rarmc8051_design.zipmcpu_1 [1] .05. zipminicpu.zipmmc_lark_original.zip
- [uart_verilog] - include UART port of VERILOG source, the
- [verilogforuart] - universal asynchronous receiver/transmit
- [USBtoUARTtransform_module] - procedure includes a USB and UART conver
- [8251Verilog] - Universal Serial Asynchronous Receiver T
- [S3C44B0X] - This article S3C44B0X give a comprehensi
- [uart_51] - 8051 agreement in line with the norms of
- [can.tar] - can controller IP core, verilog language
- [usart] - USART coded in VHDL. It is writted in 5
- [usart] - Usart model in vhdl code
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