Description: UART serial procedures, verilog statement, very good communication to achieve the UART function!
- [CRC-Verilog] - this Cyclic Redundancy is well-tested Ve
- [Uart_16550_Verilog_Source] - UART_16550_verilogHDL source, lattice ch
- [ccd-in-verilog] - ALTERA on a number of Verilog CCD proced
- [xapp485] - XAPP485- to as high as the rate of 666 M
- [clk_div] - Verilog realize multi-clock, can be appl
- [uart] - UART code written in VHDL, experience ca
- [uart_dout] - Full-duplex UART port communication prog
- [uart(Verilog)] - UART asynchronous serial communication p
- [xapp341] - verilog uart for spartan 3 fpga, its gre
File list (Check if you may need any files):