Description: Verilog serial receive process, ACTEL Fusion FPGA in the experimental success and share with everyone! ^ _ ^
- [uart_51] - 8051 agreement in line with the norms of
- [cyclic] - FPGA serial communication program, accep
- [S7_UART] - FPGA realization of the use of serial co
- [chenxu] - This is more than 18B20 sensor mounted C
- [UART_send] - Verilog HDL send serial procedures, ACTE
- [16qam] - QAM matlab to do with the basic principl
- [rs232] - dp_xiliux the CPLD Verilog design experi
- [DA] - FPGA control DAC2807 source, Verilog. A
- [DDS] - FPGA to control the AD9854 source file,
- [serial] - FPGA-based serial procedures, Verilog la
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