Description: FPGA development of frequently used sub-frequency, sub-frequency is easy, but the program can achieve arbitrary duty cycle of arbitrary frequency, using Verilog prepared, very easy to use.
To Search:
- [clock_divider] - Generate arbitrary decimal divider princ
- [fenpin] - FPGA hardware language about the arbitra
- [uart01] - A RS232 computer interface implementatio
- [ADconverter] - A Design of the A/D Convertion Sampling
- [DE2_TV_PAL] - fpga pal to vga ，writed in verilog
File list (Check if you may need any files):
verilog _renyifenpin.txt
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