Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: Viterbi_IP Download
 Description: viterbi decoder IP core, the compiler can directly use
 Downloaders recently: [More information of uploader nainln7715]
 To Search: viterbi viterbi vhdl viterbi decoder VHDL viterbi
  • [viterbi213] - provided a hard decision of the Viterbi
  • [fft] - VHDL language fft transform algorithm ip
  • [viterbi] - VHDL procedures vertibe realize the enco
  • [viterbi] - Introduced a viterbi decoder codec desig
  • [123456] - The use of MATLAB for simulation of freq
  • [viterbidecoder] - 2,1,7 convolutional code of viterbi deco
  • [viterbi] - A (k, n, K) convolutional codes Viterbi
  • [7743366312] - c realize viterbi algorithm has been ver
  • [ViterbiDecodeK9R12HardDecision] - hard-decision viterbi decoding, the basi
  • [husw] - Language Design with VHDL Viterbi decode
File list (Check if you may need any files): 
Viterbi_IP
..........\time_sim.sdf
..........\time_sim.vhd

CodeBus www.codebus.net