Description: Using Altera s FPGA chips, in MAX+ Plus II software platform to achieve multi-channel HDLC circuit
- [ModelsimChineseDirectory.Rar] - Modelsim Chinese guide, a three stresses
- [hdlc_manual] - HDLC protocol is widely used in telecomm
- [flash_erase] - FPGA flash-programmed, the use of CYCLON
- [HDLC] - HDLC link layer protocol of the CRC chec
- [hdlc_vhdl] - This a VHDL implementation of an HDLC co
- [HDLC] - In the area of communications used in a
- [Serial] - MAX2-based use of Quartus Serial Communi
- [trunk-hdlc] - - 8 bit parallel backend interface - use
- [LAOWAI] - Written by a foreigner HDLC protocols, i
- [hdlcprotocol] - hdlc prototypes
File list (Check if you may need any files):
使用FPGA实现HDLC.doc