采用Verilog HDL语言编写的数字频率计
...................................\VerilogHDL_counter
...................................\..................\counter
...................................\..................\.......\cmp_state.ini
...................................\..................\.......\counter.asm.rpt
...................................\..................\.......\counter.bsf
...................................\..................\.......\counter.done
...................................\..................\.......\counter.fit.eqn
...................................\..................\.......\counter.fit.rpt
...................................\..................\.......\counter.fit.summary
...................................\..................\.......\counter.flow.rpt
...................................\..................\.......\counter.map.eqn
...................................\..................\.......\counter.map.rpt
...................................\..................\.......\counter.map.summary
...................................\..................\.......\counter.pin
...................................\..................\.......\counter.pof
...................................\..................\.......\counter.qpf
...................................\..................\.......\counter.qsf
...................................\..................\.......\counter.qws
...................................\..................\.......\counter.sim.rpt
...................................\..................\.......\counter.tan.rpt
...................................\..................\.......\counter.tan.summary
...................................\..................\.......\counter.v
...................................\..................\.......\counter.vwf
...................................\..................\.......\counter10.v
...................................\..................\.......\counter_assignment_defaults.qdf
...................................\..................\.......\db
...................................\..................\.......\..\counter.db_info
...................................\..................\.......\..\counter.eco.cdb
...................................\..................\.......\..\counter.sld_design_entry.sci
...................................\..................\.......\..\counter_cmp.qrpt
...................................\..................\.......\..\counter_sim.qrpt
...................................\..................\.......\Waveform1.vwf
...................................\..................\data_mux
...................................\..................\........\cmp_state.ini
...................................\..................\........\data_mux.asm.rpt
...................................\..................\........\data_mux.bsf
...................................\..................\........\data_mux.done
...................................\..................\........\data_mux.fit.eqn
...................................\..................\........\data_mux.fit.rpt
...................................\..................\........\data_mux.fit.summary
...................................\..................\........\data_mux.flow.rpt
...................................\..................\........\data_mux.map.eqn
...................................\..................\........\data_mux.map.rpt
...................................\..................\........\data_mux.map.summary
...................................\..................\........\data_mux.pin
...................................\..................\........\data_mux.pof
...................................\..................\........\data_mux.qpf
...................................\..................\........\data_mux.qsf
...................................\..................\........\data_mux.qws
...................................\..................\........\data_mux.sim.rpt
...................................\..................\........\data_mux.tan.rpt
...................................\..................\........\data_m