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Title: C20_sram_vga Download
 Description: Sd card FPGA applications such as control, led control, vga audio control
 Downloaders recently: [More information of uploader zhongzao123]
  • [code] - Two of the projects themselves to do: a
  • [16multi16] - VHDL language to achieve the 16 by 16 do
  • [alltest_c35] - Sd card FPGA applications such as contro
  • [FPGA_SEG7_V4] - Sd card FPGA applications such as contro
  • [VGAWorm] - VGA game implemented on FPGA
  • [LED] - This design used the Nios II embedded pr
  • [FPGA_VGA_displaydoctum] - The use of FPGA control VGA display rele
File list (Check if you may need any files):
C20_sram_vga
............\altpll0.bsf
............\altpll0.v
............\altpll0_bb.v

............\altpll0_waveforms.html
............\C20_sram_vga.asm.rpt
............\C20_sram_vga.bdf
............\C20_sram_vga.done
............\C20_sram_vga.fit.eqn
............\C20_sram_vga.fit.rpt
............\C20_sram_vga.fit.summary
............\C20_sram_vga.flow.rpt
............\C20_sram_vga.map.eqn
............\C20_sram_vga.map.rpt
............\C20_sram_vga.map.summary
............\C20_sram_vga.pin
............\C20_sram_vga.pof
............\C20_sram_vga.qpf
............\C20_sram_vga.qsf
............\C20_sram_vga.qws
............\C20_sram_vga.sof
............\C20_sram_vga.tan.rpt
............\C20_sram_vga.tan.summary
............\cpu_0.ocp
............\cpu_0.v
............\cpu_0_jtag_debug_module.v
............\cpu_0_jtag_debug_module_wrapper.v
............\cpu_0_ociram_default_contents.mif
............\cpu_0_test_bench.v
............\db
............\..\C20_sram_vga.db_info
............\..\C20_sram_vga.eco.cdb
............\..\C20_sram_vga.sld_design_entry.sci
............\dma_0.v
............\hdl
............\...\vga_controller_stream.v
............\...\vga_pixel_fifo.v
............\...\VGA_time.vhd
............\ic_tag_ram.mif
............\jtag_uart_0.v
............\Nios.bsf
............\Nios.ptf
............\Nios.ptf.bak
............\Nios.v
............\Nios_generation_script
............\Nios_log.txt
............\Nios_setup_quartus.tcl
............\Nios_sim
............\........\atail-f.pl
............\........\dummy_file
............\........\jtag_uart_0_input_mutex.dat
............\........\jtag_uart_0_input_stream.dat
............\........\jtag_uart_0_output_stream.dat
............\pio_0.v
............\pio_key.v
............\pio_led.v
............\rf_ram_a.mif
............\rf_ram_b.mif
............\sdram_0.v
............\sdram_0_test_component.v
............\setup.tcl
............\software
............\........\VGA_MAIN
............\........\........\.cdtbuild
............\........\........\.cdtproject
............\........\........\.project
............\........\........\application.stf
............\........\........\Debug
............\........\........\.....\cfi_flash_0.flash
............\........\........\.....\generated_app.sh
............\........\........\.....\makefile
............\........\........\.....\obj
............\........\........\.....\...\main.d
............\........\........\.....\...\main.o
............\........\........\.....\subdir.mk
............\........\........\.....\VGA_MAIN.elf
............\........\........\IMAG.H
............\........\........\main.c
............\........\........\nios2-gdb-server.exe.stackdump
............\........\........\readme.txt
............\........\VGA_MAIN_syslib
............\........\...............\.cdtbuild
............\........\...............\.cdtproject
............\........\...............\.project
............\........\...............\Debug
............\........\...............\.....\crt0.d
............\........\...............\.....\crt0.o
............\........\...............\.....\libVGA_MAIN_syslib.a
............\........\...............\.....\makefile
............\........\...............\.....\obj
............\........\...............\.....\...\altera_avalon_cfi_flash.d
............\........\...............\.....\...\altera_avalon_cfi_flash.o
............\........\...............\.....\...\altera_avalon_cfi_flash_amd.d
............\........\...............\.....\...\altera_avalon_cfi_flash_amd.o
............\........\...............\.....\...\altera_avalon_cfi_flash_intel.d
............\........\...............\.....\...\altera_avalon_cfi_flash_intel.o
............\........\...............\.....\...\altera_avalon_cfi_flash_table.d
............\........\...............\.....\...\altera_avalon_cfi_flash_table.o
............\........\...............\.....\...\altera_avalon_dma.d
    

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